From: Dinh Nguyen <dinguyen@kernel.org>
To: linux-arm-kernel@lists.infradead.org
Cc: dinguyen@kernel.org, devicetree@vger.kernel.org
Subject: [PATCH 2/3] arm: dts: socfpga: add reset-names to spi node
Date: Wed, 15 Jul 2020 14:28:23 -0500 [thread overview]
Message-ID: <20200715192824.22210-2-dinguyen@kernel.org> (raw)
In-Reply-To: <20200715192824.22210-1-dinguyen@kernel.org>
Add reset-names = "spi" to spi dts nodes.
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
---
arch/arm/boot/dts/socfpga.dtsi | 2 ++
arch/arm/boot/dts/socfpga_arria10.dtsi | 2 ++
arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi | 2 ++
arch/arm64/boot/dts/intel/socfpga_agilex.dtsi | 2 ++
4 files changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi
index c2b54af417a2..a5fde3691d42 100644
--- a/arch/arm/boot/dts/socfpga.dtsi
+++ b/arch/arm/boot/dts/socfpga.dtsi
@@ -829,6 +829,7 @@
num-cs = <4>;
clocks = <&spi_m_clk>;
resets = <&rst SPIM0_RESET>;
+ reset-names = "spi";
status = "disabled";
};
@@ -841,6 +842,7 @@
num-cs = <4>;
clocks = <&spi_m_clk>;
resets = <&rst SPIM1_RESET>;
+ reset-names = "spi";
status = "disabled";
};
diff --git a/arch/arm/boot/dts/socfpga_arria10.dtsi b/arch/arm/boot/dts/socfpga_arria10.dtsi
index 3b8571b8b412..fe5826805519 100644
--- a/arch/arm/boot/dts/socfpga_arria10.dtsi
+++ b/arch/arm/boot/dts/socfpga_arria10.dtsi
@@ -613,6 +613,7 @@
/*32bit_access;*/
clocks = <&spi_m_clk>;
resets = <&rst SPIM0_RESET>;
+ reset-names = "spi";
status = "disabled";
};
@@ -628,6 +629,7 @@
rx-dma-channel = <&pdma 17>;
clocks = <&spi_m_clk>;
resets = <&rst SPIM1_RESET>;
+ reset-names = "spi";
status = "disabled";
};
diff --git a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
index d1fc9c2055f4..d71961942b5b 100644
--- a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
+++ b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
@@ -380,6 +380,7 @@
reg = <0xffda4000 0x1000>;
interrupts = <0 99 4>;
resets = <&rst SPIM0_RESET>;
+ reset-names = "spi";
reg-io-width = <4>;
num-cs = <4>;
clocks = <&clkmgr STRATIX10_L4_MAIN_CLK>;
@@ -393,6 +394,7 @@
reg = <0xffda5000 0x1000>;
interrupts = <0 100 4>;
resets = <&rst SPIM1_RESET>;
+ reset-names = "spi";
reg-io-width = <4>;
num-cs = <4>;
clocks = <&clkmgr STRATIX10_L4_MAIN_CLK>;
diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi b/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi
index ac1b2422e8d4..9d7f19e97df7 100644
--- a/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi
+++ b/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi
@@ -380,6 +380,7 @@
reg = <0xffda4000 0x1000>;
interrupts = <0 99 4>;
resets = <&rst SPIM0_RESET>;
+ reset-names = "spi";
reg-io-width = <4>;
num-cs = <4>;
clocks = <&clkmgr AGILEX_L4_MAIN_CLK>;
@@ -393,6 +394,7 @@
reg = <0xffda5000 0x1000>;
interrupts = <0 100 4>;
resets = <&rst SPIM1_RESET>;
+ reset-names = "spi";
reg-io-width = <4>;
num-cs = <4>;
clocks = <&clkmgr AGILEX_L4_MAIN_CLK>;
--
2.17.1
next prev parent reply other threads:[~2020-07-15 19:28 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-07-15 19:28 [PATCH 1/3] arm64: dts: agilex: add nand clocks Dinh Nguyen
2020-07-15 19:28 ` Dinh Nguyen [this message]
2020-07-15 19:28 ` [PATCH 3/3] ARM: dts: socfpga: add the temperature sensor to the Arria10 devkit Dinh Nguyen
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