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From: Chen-Yu Tsai <wens@kernel.org>
To: Maxime Ripard <mripard@kernel.org>
Cc: Chen-Yu Tsai <wens@csie.org>, Rob Herring <robh+dt@kernel.org>,
	linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org
Subject: [PATCH v2 4/8] arm64: dts: allwinner: h5: Add clock to CPU cores
Date: Sat, 18 Jul 2020 00:00:49 +0800	[thread overview]
Message-ID: <20200717160053.31191-5-wens@kernel.org> (raw)
In-Reply-To: <20200717160053.31191-1-wens@kernel.org>

From: Chen-Yu Tsai <wens@csie.org>

The ARM CPU cores are fed by the CPU clock from the CCU. Add a
reference to the clock for each CPU core, along with the clock
transition latency.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
---
 arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi
index 4462a68c0681..09523f6011c5 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi
@@ -13,6 +13,8 @@ cpu0: cpu@0 {
 			device_type = "cpu";
 			reg = <0>;
 			enable-method = "psci";
+			clocks = <&ccu CLK_CPUX>;
+			clock-latency-ns = <244144>; /* 8 32k periods */
 		};
 
 		cpu1: cpu@1 {
@@ -20,6 +22,8 @@ cpu1: cpu@1 {
 			device_type = "cpu";
 			reg = <1>;
 			enable-method = "psci";
+			clocks = <&ccu CLK_CPUX>;
+			clock-latency-ns = <244144>; /* 8 32k periods */
 		};
 
 		cpu2: cpu@2 {
@@ -27,6 +31,8 @@ cpu2: cpu@2 {
 			device_type = "cpu";
 			reg = <2>;
 			enable-method = "psci";
+			clocks = <&ccu CLK_CPUX>;
+			clock-latency-ns = <244144>; /* 8 32k periods */
 		};
 
 		cpu3: cpu@3 {
@@ -34,6 +40,8 @@ cpu3: cpu@3 {
 			device_type = "cpu";
 			reg = <3>;
 			enable-method = "psci";
+			clocks = <&ccu CLK_CPUX>;
+			clock-latency-ns = <244144>; /* 8 32k periods */
 		};
 	};
 
-- 
2.27.0


  parent reply	other threads:[~2020-07-17 16:00 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-07-17 16:00 [PATCH v2 0/8] arm64: dts: allwinner: h5: Enable CPU DVFS (cpufreq) Chen-Yu Tsai
2020-07-17 16:00 ` [PATCH v2 1/8] ARM: dts: sunxi: libretech-all-h3-cc: Add regulator supply to all CPU cores Chen-Yu Tsai
2020-07-17 16:00 ` [PATCH v2 2/8] ARM: dts: sunxi: bananapi-m2-plus-v1.2: " Chen-Yu Tsai
2020-07-17 16:00 ` [PATCH v2 3/8] ARM: dts: sunxi: bananapi-m2-plus-v1.2: Fix CPU supply voltages Chen-Yu Tsai
2020-07-17 16:00 ` Chen-Yu Tsai [this message]
2020-07-17 16:00 ` [PATCH v2 5/8] arm64: dts: allwinner: h5: Add trip and cooling maps to CPU thermal zones Chen-Yu Tsai
2020-07-17 16:00 ` [PATCH v2 6/8] arm64: dts: allwinner: h5: Add CPU Operating Performance Points table Chen-Yu Tsai
2020-07-17 16:00 ` [PATCH v2 7/8] arm64: dts: allwinner: h5: libretech-all-h3-cc: Tie in CPU OPPs Chen-Yu Tsai
2020-07-17 16:00 ` [PATCH v2 8/8] arm64: dts: allwinner: h5: bananapi-m2-plus-v1.2: " Chen-Yu Tsai
2020-07-20 14:11 ` [PATCH v2 0/8] arm64: dts: allwinner: h5: Enable CPU DVFS (cpufreq) Maxime Ripard

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