From: Rob Herring <robh@kernel.org>
To: Lokesh Vutla <lokeshvutla@ti.com>
Cc: Marc Zyngier <maz@kernel.org>,
Thomas Gleixner <tglx@linutronix.de>, Nishanth Menon <nm@ti.com>,
Tero Kristo <t-kristo@ti.com>,
Santosh Shilimkar <ssantosh@kernel.org>,
Linux ARM Mailing List <linux-arm-kernel@lists.infradead.org>,
Sekhar Nori <nsekhar@ti.com>,
Grygorii Strashko <grygorii.strashko@ti.com>,
Peter Ujfalusi <peter.ujfalusi@ti.com>,
Device Tree Mailing List <devicetree@vger.kernel.org>
Subject: Re: [PATCH v2 5/9] dt-bindings: irqchip: Convert ti,sci-intr bindings to yaml
Date: Tue, 21 Jul 2020 09:55:50 -0600 [thread overview]
Message-ID: <20200721155550.GA358222@bogus> (raw)
In-Reply-To: <20200721061007.28324-6-lokeshvutla@ti.com>
On Tue, Jul 21, 2020 at 11:40:03AM +0530, Lokesh Vutla wrote:
> In order to automate the verification of DT nodes convert
> ti,sci-intr.txt ti,sci-intr.yaml.
>
> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
> ---
> .../interrupt-controller/ti,sci-intr.txt | 83 -------------
> .../interrupt-controller/ti,sci-intr.yaml | 113 ++++++++++++++++++
> MAINTAINERS | 2 +-
> 3 files changed, 114 insertions(+), 84 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/interrupt-controller/ti,sci-intr.txt
> create mode 100644 Documentation/devicetree/bindings/interrupt-controller/ti,sci-intr.yaml
>
> diff --git a/Documentation/devicetree/bindings/interrupt-controller/ti,sci-intr.txt b/Documentation/devicetree/bindings/interrupt-controller/ti,sci-intr.txt
> deleted file mode 100644
> index 8b56b2de1c73..000000000000
> --- a/Documentation/devicetree/bindings/interrupt-controller/ti,sci-intr.txt
> +++ /dev/null
> @@ -1,83 +0,0 @@
> -Texas Instruments K3 Interrupt Router
> -=====================================
> -
> -The Interrupt Router (INTR) module provides a mechanism to mux M
> -interrupt inputs to N interrupt outputs, where all M inputs are selectable
> -to be driven per N output. An Interrupt Router can either handle edge triggered
> -or level triggered interrupts and that is fixed in hardware.
> -
> - Interrupt Router
> - +----------------------+
> - | Inputs Outputs |
> - +-------+ | +------+ +-----+ |
> - | GPIO |----------->| | irq0 | | 0 | | Host IRQ
> - +-------+ | +------+ +-----+ | controller
> - | . . | +-------+
> - +-------+ | . . |----->| IRQ |
> - | INTA |----------->| . . | +-------+
> - +-------+ | . +-----+ |
> - | +------+ | N | |
> - | | irqM | +-----+ |
> - | +------+ |
> - | |
> - +----------------------+
> -
> -There is one register per output (MUXCNTL_N) that controls the selection.
> -Configuration of these MUXCNTL_N registers is done by a system controller
> -(like the Device Memory and Security Controller on K3 AM654 SoC). System
> -controller will keep track of the used and unused registers within the Router.
> -Driver should request the system controller to get the range of GIC IRQs
> -assigned to the requesting hosts. It is the drivers responsibility to keep
> -track of Host IRQs.
> -
> -Communication between the host processor running an OS and the system
> -controller happens through a protocol called TI System Control Interface
> -(TISCI protocol). For more details refer:
> -Documentation/devicetree/bindings/arm/keystone/ti,sci.txt
> -
> -TISCI Interrupt Router Node:
> -----------------------------
> -Required Properties:
> -- compatible: Must be "ti,sci-intr".
> -- ti,intr-trigger-type: Should be one of the following:
> - 1: If intr supports edge triggered interrupts.
> - 4: If intr supports level triggered interrupts.
> -- interrupt-controller: Identifies the node as an interrupt controller
> -- #interrupt-cells: Specifies the number of cells needed to encode an
> - interrupt source. The value should be 1.
> - First cell should contain interrupt router input number
> - as specified by hardware.
> -- ti,sci: Phandle to TI-SCI compatible System controller node.
> -- ti,sci-dev-id: TISCI device id of interrupt controller.
> -- ti,interrupt-ranges: Set of triplets containing ranges that convert
> - the INTR output interrupt numbers to parent's
> - interrupt number. Each triplet has following entries:
> - - First entry specifies the base for intr output irq
> - - Second entry specifies the base for parent irqs
> - - Third entry specifies the limit
> -
> -For more details on TISCI IRQ resource management refer:
> -http://downloads.ti.com/tisci/esd/latest/2_tisci_msgs/rm/rm_irq.html
> -
> -Example:
> ---------
> -The following example demonstrates both interrupt router node and the consumer
> -node(main gpio) on the AM654 SoC:
> -
> -main_gpio_intr: interrupt-controller0 {
> - compatible = "ti,sci-intr";
> - ti,intr-trigger-type = <1>;
> - interrupt-controller;
> - interrupt-parent = <&gic500>;
> - #interrupt-cells = <1>;
> - ti,sci = <&dmsc>;
> - ti,sci-dev-id = <131>;
> - ti,interrupt-ranges = <0 360 32>;
> -};
> -
> -main_gpio0: gpio@600000 {
> - ...
> - interrupt-parent = <&main_gpio_intr>;
> - interrupts = <192>, <193>, <194>, <195>, <196>, <197>;
> - ...
> -};
> diff --git a/Documentation/devicetree/bindings/interrupt-controller/ti,sci-intr.yaml b/Documentation/devicetree/bindings/interrupt-controller/ti,sci-intr.yaml
> new file mode 100644
> index 000000000000..fbc1e8631d6f
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/interrupt-controller/ti,sci-intr.yaml
> @@ -0,0 +1,113 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/interrupt-controller/ti,sci-intr.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Texas Instruments K3 Interrupt Router
> +
> +maintainers:
> + - Lokesh Vutla <lokeshvutla@ti.com>
> +
> +allOf:
> + - $ref: /schemas/interrupt-controller.yaml#
Don't need this. It is selected by the node name.
> +
> +description: |
> + The Interrupt Router (INTR) module provides a mechanism to mux M
> + interrupt inputs to N interrupt outputs, where all M inputs are selectable
> + to be driven per N output. An Interrupt Router can either handle edge
> + triggered or level triggered interrupts and that is fixed in hardware.
> +
> + Interrupt Router
> + +----------------------+
> + | Inputs Outputs |
> + +-------+ | +------+ +-----+ |
> + | GPIO |----------->| | irq0 | | 0 | | Host IRQ
> + +-------+ | +------+ +-----+ | controller
> + | . . | +-------+
> + +-------+ | . . |----->| IRQ |
> + | INTA |----------->| . . | +-------+
> + +-------+ | . +-----+ |
> + | +------+ | N | |
> + | | irqM | +-----+ |
> + | +------+ |
> + | |
> + +----------------------+
> +
> + There is one register per output (MUXCNTL_N) that controls the selection.
> + Configuration of these MUXCNTL_N registers is done by a system controller
> + (like the Device Memory and Security Controller on K3 AM654 SoC). System
> + controller will keep track of the used and unused registers within the Router.
> + Driver should request the system controller to get the range of GIC IRQs
> + assigned to the requesting hosts. It is the drivers responsibility to keep
> + track of Host IRQs.
> +
> + Communication between the host processor running an OS and the system
> + controller happens through a protocol called TI System Control Interface
> + (TISCI protocol).
> +
> +properties:
> + compatible:
> + const: ti,sci-intr
> +
> + ti,intr-trigger-type:
> + description: |
> + Should be one of the following.
> + 1 = If intr supports edge triggered interrupts.
> + 4 = If intr supports level triggered interrupts.
Looks like constraints.
> + allOf:
You can drop 'allOf' now.
> + - $ref: /schemas/types.yaml#/definitions/uint32
> +
> + interrupt-controller: true
> +
> + '#interrupt-cells':
> + const: 1
> + description: |
> + The 1st cell should contain interrupt router input hw number.
> +
> + ti,sci:
> + description: phandle to TI-SCI compatible System controller node
> + allOf:
> + - $ref: /schemas/types.yaml#/definitions/phandle
> +
> + ti,sci-dev-id:
> + description: TI-SCI device id of Interrupt Controller
> + allOf:
> + - $ref: /schemas/types.yaml#/definitions/uint32
Use the common definition Suman did.
> +
> + ti,interrupt-ranges:
> + description: |
> + Interrupt ranges that converts the INTR output hw irq numbers
> + to parents's input interrupt numbers.
> + allOf:
> + - $ref: /schemas/types.yaml#/definitions/uint32-matrix
> + - items:
> + items:
> + - description: |
> + "output_irq" specifies the base for intr output irq
> + - description: |
> + "parent's input irq" specifies the base for parent irq
> + - description: |
> + "limit" specifies the limit for translation
> +
> +required:
> + - compatible
> + - ti,intr-trigger-type
> + - interrupt-controller
> + - '#interrupt-cells'
> + - ti,sci
> + - ti,sci-dev-id
> + - ti,interrupt-ranges
> +
> +examples:
> + - |
> + main_gpio_intr: interrupt-controller0 {
> + compatible = "ti,sci-intr";
> + ti,intr-trigger-type = <1>;
> + interrupt-controller;
> + interrupt-parent = <&gic500>;
> + #interrupt-cells = <1>;
> + ti,sci = <&dmsc>;
> + ti,sci-dev-id = <131>;
> + ti,interrupt-ranges = <0 360 32>;
> + };
> diff --git a/MAINTAINERS b/MAINTAINERS
> index d53db30d1365..2f18fbccd71a 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -16905,7 +16905,7 @@ S: Maintained
> F: Documentation/devicetree/bindings/arm/keystone/ti,sci.txt
> F: Documentation/devicetree/bindings/clock/ti,sci-clk.txt
> F: Documentation/devicetree/bindings/interrupt-controller/ti,sci-inta.txt
> -F: Documentation/devicetree/bindings/interrupt-controller/ti,sci-intr.txt
> +F: Documentation/devicetree/bindings/interrupt-controller/ti,sci-intr.yaml
> F: Documentation/devicetree/bindings/reset/ti,sci-reset.txt
> F: Documentation/devicetree/bindings/soc/ti/sci-pm-domain.txt
> F: drivers/clk/keystone/sci-clk.c
> --
> 2.27.0
>
next prev parent reply other threads:[~2020-07-21 15:55 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-07-21 6:09 [PATCH v2 0/9] irqchip: ti,sci-intr/inta: Update the dt bindings to accept different interrupt parents Lokesh Vutla
2020-07-21 6:09 ` [PATCH v2 1/9] firmware: ti_sci: Drop the device id to resource type translation Lokesh Vutla
2020-07-21 6:10 ` [PATCH v2 2/9] firmware: ti_sci: Drop unused structure ti_sci_rm_type_map Lokesh Vutla
2020-07-21 6:10 ` [PATCH v2 3/9] firmware: ti_sci: Add support for getting resource with subtype Lokesh Vutla
2020-07-21 6:10 ` [PATCH v2 4/9] dt-bindings: irqchip: ti,sci-intr: Update bindings to drop the usage of gic as parent Lokesh Vutla
2020-07-21 6:10 ` [PATCH v2 5/9] dt-bindings: irqchip: Convert ti,sci-intr bindings to yaml Lokesh Vutla
2020-07-21 15:49 ` [PATCH v2 5/9] dt-bindings: irqchip: Convert ti, sci-intr " Rob Herring
2020-07-21 15:55 ` Rob Herring [this message]
2020-07-21 6:10 ` [PATCH v2 6/9] irqchip/ti-sci-intr: Add support for INTR being a parent to INTR Lokesh Vutla
2020-07-21 6:10 ` [PATCH v2 7/9] dt-bindings: irqchip: ti,sci-inta: Update docs to support different parent Lokesh Vutla
2020-07-21 6:10 ` [PATCH v2 8/9] dt-bindings: irqchip: Convert ti,sci-inta bindings to yaml Lokesh Vutla
2020-07-21 15:56 ` [PATCH v2 8/9] dt-bindings: irqchip: Convert ti, sci-inta " Rob Herring
2020-07-21 6:10 ` [PATCH v2 9/9] irqchip/ti-sci-inta: Add support for INTA directly connecting to GIC Lokesh Vutla
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