* [PATCH 01/16] dt-bindings: atmel-tcb: convert bindings to json-schema [not found] <1b1122f4-bce9-f349-e602-ed8e14cbb501@linaro.org> @ 2020-07-23 15:26 ` Daniel Lezcano 2020-07-23 15:26 ` [PATCH 02/16] dt-bindings: microchip: atmel,at91rm9200-tcb: add sama5d2 compatible Daniel Lezcano ` (4 more replies) 0 siblings, 5 replies; 6+ messages in thread From: Daniel Lezcano @ 2020-07-23 15:26 UTC (permalink / raw) To: tglx Cc: Alexandre Belloni, Rob Herring, Lee Jones, Rob Herring, Nicolas Ferre, Ludovic Desroches, open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS, moderated list:ARM/Microchip (AT91) SoC support, open list From: Alexandre Belloni <alexandre.belloni@bootlin.com> Convert Atmel Timer Counter Blocks bindings to DT schema format using json-schema. Also move it out of mfd as it is not and has never been related to mfd. Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/20200710230813.1005150-2-alexandre.belloni@bootlin.com --- .../devicetree/bindings/mfd/atmel-tcb.txt | 56 -------- .../soc/microchip/atmel,at91rm9200-tcb.yaml | 131 ++++++++++++++++++ 2 files changed, 131 insertions(+), 56 deletions(-) delete mode 100644 Documentation/devicetree/bindings/mfd/atmel-tcb.txt create mode 100644 Documentation/devicetree/bindings/soc/microchip/atmel,at91rm9200-tcb.yaml diff --git a/Documentation/devicetree/bindings/mfd/atmel-tcb.txt b/Documentation/devicetree/bindings/mfd/atmel-tcb.txt deleted file mode 100644 index c4a83e364cb6..000000000000 --- a/Documentation/devicetree/bindings/mfd/atmel-tcb.txt +++ /dev/null @@ -1,56 +0,0 @@ -* Device tree bindings for Atmel Timer Counter Blocks -- compatible: Should be "atmel,<chip>-tcb", "simple-mfd", "syscon". - <chip> can be "at91rm9200" or "at91sam9x5" -- reg: Should contain registers location and length -- #address-cells: has to be 1 -- #size-cells: has to be 0 -- interrupts: Should contain all interrupts for the TC block - Note that you can specify several interrupt cells if the TC - block has one interrupt per channel. -- clock-names: tuple listing input clock names. - Required elements: "t0_clk", "slow_clk" - Optional elements: "t1_clk", "t2_clk" -- clocks: phandles to input clocks. - -The TCB can expose multiple subdevices: - * a timer - - compatible: Should be "atmel,tcb-timer" - - reg: Should contain the TCB channels to be used. If the - counter width is 16 bits (at91rm9200-tcb), two consecutive - channels are needed. Else, only one channel will be used. - -Examples: - -One interrupt per TC block: - tcb0: timer@fff7c000 { - compatible = "atmel,at91rm9200-tcb", "simple-mfd", "syscon"; - #address-cells = <1>; - #size-cells = <0>; - reg = <0xfff7c000 0x100>; - interrupts = <18 4>; - clocks = <&tcb0_clk>, <&clk32k>; - clock-names = "t0_clk", "slow_clk"; - - timer@0 { - compatible = "atmel,tcb-timer"; - reg = <0>, <1>; - }; - - timer@2 { - compatible = "atmel,tcb-timer"; - reg = <2>; - }; - }; - -One interrupt per TC channel in a TC block: - tcb1: timer@fffdc000 { - compatible = "atmel,at91rm9200-tcb", "simple-mfd", "syscon"; - #address-cells = <1>; - #size-cells = <0>; - reg = <0xfffdc000 0x100>; - interrupts = <26 4>, <27 4>, <28 4>; - clocks = <&tcb1_clk>, <&clk32k>; - clock-names = "t0_clk", "slow_clk"; - }; - - diff --git a/Documentation/devicetree/bindings/soc/microchip/atmel,at91rm9200-tcb.yaml b/Documentation/devicetree/bindings/soc/microchip/atmel,at91rm9200-tcb.yaml new file mode 100644 index 000000000000..9d680e0b9109 --- /dev/null +++ b/Documentation/devicetree/bindings/soc/microchip/atmel,at91rm9200-tcb.yaml @@ -0,0 +1,131 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/soc/microchip/atmel,at91rm9200-tcb.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Atmel Timer Counter Block + +maintainers: + - Alexandre Belloni <alexandre.belloni@bootlin.com> + +description: | + The Atmel (now Microchip) SoCs have timers named Timer Counter Block. Each + timer has three channels with two counters each. + +properties: + compatible: + items: + - enum: + - atmel,at91rm9200-tcb + - atmel,at91sam9x5-tcb + - const: simple-mfd + - const: syscon + + reg: + maxItems: 1 + + interrupts: + description: + List of interrupts. One interrupt per TCB channel if available or one + interrupt for the TC block + minItems: 1 + maxItems: 3 + + clock-names: + description: + List of clock names. Always includes t0_clk and slow clk. Also includes + t1_clk and t2_clk if a clock per channel is available. + oneOf: + - items: + - const: t0_clk + - const: slow_clk + - items: + - const: t0_clk + - const: t1_clk + - const: t2_clk + - const: slow_clk + minItems: 2 + maxItems: 4 + + clocks: + minItems: 2 + maxItems: 4 + + '#address-cells': + const: 1 + + '#size-cells': + const: 0 + +patternProperties: + "^timer@[0-2]$": + description: The timer block channels that are used as timers. + type: object + properties: + compatible: + const: atmel,tcb-timer + reg: + description: + List of channels to use for this particular timer. + minItems: 1 + maxItems: 3 + + required: + - compatible + - reg + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + - '#address-cells' + - '#size-cells' + +additionalProperties: false + +examples: + - | + /* One interrupt per TC block: */ + tcb0: timer@fff7c000 { + compatible = "atmel,at91rm9200-tcb", "simple-mfd", "syscon"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0xfff7c000 0x100>; + interrupts = <18 4>; + clocks = <&tcb0_clk>, <&clk32k>; + clock-names = "t0_clk", "slow_clk"; + + timer@0 { + compatible = "atmel,tcb-timer"; + reg = <0>, <1>; + }; + + timer@2 { + compatible = "atmel,tcb-timer"; + reg = <2>; + }; + }; + + /* One interrupt per TC channel in a TC block: */ + tcb1: timer@fffdc000 { + compatible = "atmel,at91rm9200-tcb", "simple-mfd", "syscon"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0xfffdc000 0x100>; + interrupts = <26 4>, <27 4>, <28 4>; + clocks = <&tcb1_clk>, <&clk32k>; + clock-names = "t0_clk", "slow_clk"; + + timer@0 { + compatible = "atmel,tcb-timer"; + reg = <0>; + }; + + timer@1 { + compatible = "atmel,tcb-timer"; + reg = <1>; + }; + }; -- 2.25.1 ^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH 02/16] dt-bindings: microchip: atmel,at91rm9200-tcb: add sama5d2 compatible 2020-07-23 15:26 ` [PATCH 01/16] dt-bindings: atmel-tcb: convert bindings to json-schema Daniel Lezcano @ 2020-07-23 15:26 ` Daniel Lezcano 2020-07-23 15:26 ` [PATCH 03/16] ARM: dts: at91: sama5d2: add TCB GCLK Daniel Lezcano ` (3 subsequent siblings) 4 siblings, 0 replies; 6+ messages in thread From: Daniel Lezcano @ 2020-07-23 15:26 UTC (permalink / raw) To: tglx Cc: Alexandre Belloni, Rob Herring, Rob Herring, Nicolas Ferre, Ludovic Desroches, open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS, moderated list:ARM/Microchip (AT91) SoC support, open list From: Alexandre Belloni <alexandre.belloni@bootlin.com> The sama5d2 TC block TIMER_CLOCK1 is different from the at91sam9x5 one. Instead of being MCK / 2, it is the TCB GCLK. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/20200710230813.1005150-3-alexandre.belloni@bootlin.com --- .../soc/microchip/atmel,at91rm9200-tcb.yaml | 42 +++++++++++++++---- 1 file changed, 33 insertions(+), 9 deletions(-) diff --git a/Documentation/devicetree/bindings/soc/microchip/atmel,at91rm9200-tcb.yaml b/Documentation/devicetree/bindings/soc/microchip/atmel,at91rm9200-tcb.yaml index 9d680e0b9109..d226fd7d5258 100644 --- a/Documentation/devicetree/bindings/soc/microchip/atmel,at91rm9200-tcb.yaml +++ b/Documentation/devicetree/bindings/soc/microchip/atmel,at91rm9200-tcb.yaml @@ -19,6 +19,7 @@ properties: - enum: - atmel,at91rm9200-tcb - atmel,at91sam9x5-tcb + - atmel,sama5d2-tcb - const: simple-mfd - const: syscon @@ -36,15 +37,6 @@ properties: description: List of clock names. Always includes t0_clk and slow clk. Also includes t1_clk and t2_clk if a clock per channel is available. - oneOf: - - items: - - const: t0_clk - - const: slow_clk - - items: - - const: t0_clk - - const: t1_clk - - const: t2_clk - - const: slow_clk minItems: 2 maxItems: 4 @@ -75,6 +67,38 @@ patternProperties: - compatible - reg +allOf: + - if: + properties: + compatible: + contains: + const: atmel,sama5d2-tcb + then: + properties: + clocks: + minItems: 3 + maxItems: 3 + clock-names: + items: + - const: t0_clk + - const: gclk + - const: slow_clk + else: + properties: + clocks: + minItems: 2 + maxItems: 4 + clock-names: + oneOf: + - items: + - const: t0_clk + - const: slow_clk + - items: + - const: t0_clk + - const: t1_clk + - const: t2_clk + - const: slow_clk + required: - compatible - reg -- 2.25.1 ^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH 03/16] ARM: dts: at91: sama5d2: add TCB GCLK 2020-07-23 15:26 ` [PATCH 01/16] dt-bindings: atmel-tcb: convert bindings to json-schema Daniel Lezcano 2020-07-23 15:26 ` [PATCH 02/16] dt-bindings: microchip: atmel,at91rm9200-tcb: add sama5d2 compatible Daniel Lezcano @ 2020-07-23 15:26 ` Daniel Lezcano 2020-07-23 15:26 ` [PATCH 14/16] clocksource/drivers: Replace HTTP links with HTTPS ones Daniel Lezcano ` (2 subsequent siblings) 4 siblings, 0 replies; 6+ messages in thread From: Daniel Lezcano @ 2020-07-23 15:26 UTC (permalink / raw) To: tglx Cc: Alexandre Belloni, Nicolas Ferre, Ludovic Desroches, Rob Herring, moderated list:ARM/Microchip (AT91) SoC support, open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS, open list From: Alexandre Belloni <alexandre.belloni@bootlin.com> The sama5d2 tcbs take an extra input clock, their gclk. Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/20200710230813.1005150-4-alexandre.belloni@bootlin.com --- arch/arm/boot/dts/sama5d2.dtsi | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi index ab550d69db91..996143e966d8 100644 --- a/arch/arm/boot/dts/sama5d2.dtsi +++ b/arch/arm/boot/dts/sama5d2.dtsi @@ -499,23 +499,23 @@ macb0: ethernet@f8008000 { }; tcb0: timer@f800c000 { - compatible = "atmel,at91sam9x5-tcb", "simple-mfd", "syscon"; + compatible = "atmel,sama5d2-tcb", "simple-mfd", "syscon"; #address-cells = <1>; #size-cells = <0>; reg = <0xf800c000 0x100>; interrupts = <35 IRQ_TYPE_LEVEL_HIGH 0>; - clocks = <&pmc PMC_TYPE_PERIPHERAL 35>, <&clk32k>; - clock-names = "t0_clk", "slow_clk"; + clocks = <&pmc PMC_TYPE_PERIPHERAL 35>, <&pmc PMC_TYPE_GCK 35>, <&clk32k>; + clock-names = "t0_clk", "gclk", "slow_clk"; }; tcb1: timer@f8010000 { - compatible = "atmel,at91sam9x5-tcb", "simple-mfd", "syscon"; + compatible = "atmel,sama5d2-tcb", "simple-mfd", "syscon"; #address-cells = <1>; #size-cells = <0>; reg = <0xf8010000 0x100>; interrupts = <36 IRQ_TYPE_LEVEL_HIGH 0>; - clocks = <&pmc PMC_TYPE_PERIPHERAL 36>, <&clk32k>; - clock-names = "t0_clk", "slow_clk"; + clocks = <&pmc PMC_TYPE_PERIPHERAL 36>, <&pmc PMC_TYPE_GCK 36>, <&clk32k>; + clock-names = "t0_clk", "gclk", "slow_clk"; }; hsmc: hsmc@f8014000 { -- 2.25.1 ^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH 14/16] clocksource/drivers: Replace HTTP links with HTTPS ones 2020-07-23 15:26 ` [PATCH 01/16] dt-bindings: atmel-tcb: convert bindings to json-schema Daniel Lezcano 2020-07-23 15:26 ` [PATCH 02/16] dt-bindings: microchip: atmel,at91rm9200-tcb: add sama5d2 compatible Daniel Lezcano 2020-07-23 15:26 ` [PATCH 03/16] ARM: dts: at91: sama5d2: add TCB GCLK Daniel Lezcano @ 2020-07-23 15:26 ` Daniel Lezcano 2020-07-23 15:26 ` [PATCH 15/16] dt-bindings: timer: Add Ingenic X1000 OST bindings Daniel Lezcano 2020-07-27 14:04 ` [PATCH 01/16] dt-bindings: atmel-tcb: convert bindings to json-schema Lee Jones 4 siblings, 0 replies; 6+ messages in thread From: Daniel Lezcano @ 2020-07-23 15:26 UTC (permalink / raw) To: tglx Cc: Alexander A. Klimov, Rob Herring, Rob Herring, open list:CLOCKSOURCE, CLOCKEVENT DRIVERS, open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS From: "Alexander A. Klimov" <grandmaster@al2klimov.de> Rationale: Reduces attack surface on kernel devs opening the links for MITM as HTTPS traffic is much harder to manipulate. Deterministic algorithm: For each file: If not .svg: For each line: If doesn't contain `\bxmlns\b`: For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`: If neither `\bgnu\.org/license`, nor `\bmozilla\.org/MPL\b`: If both the HTTP and HTTPS versions return 200 OK and serve the same content: Replace HTTP with HTTPS. Signed-off-by: Alexander A. Klimov <grandmaster@al2klimov.de> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/20200708165856.15322-1-grandmaster@al2klimov.de --- Documentation/devicetree/bindings/timer/ti,keystone-timer.txt | 2 +- drivers/clocksource/timer-ti-32k.c | 2 +- drivers/clocksource/timer-ti-dm.c | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/timer/ti,keystone-timer.txt b/Documentation/devicetree/bindings/timer/ti,keystone-timer.txt index 5fbe361252b4..d3905a5412b8 100644 --- a/Documentation/devicetree/bindings/timer/ti,keystone-timer.txt +++ b/Documentation/devicetree/bindings/timer/ti,keystone-timer.txt @@ -10,7 +10,7 @@ It is global timer is a free running up-counter and can generate interrupt when the counter reaches preset counter values. Documentation: -http://www.ti.com/lit/ug/sprugv5a/sprugv5a.pdf +https://www.ti.com/lit/ug/sprugv5a/sprugv5a.pdf Required properties: diff --git a/drivers/clocksource/timer-ti-32k.c b/drivers/clocksource/timer-ti-32k.c index ae12bbf3d68c..59b0be482f32 100644 --- a/drivers/clocksource/timer-ti-32k.c +++ b/drivers/clocksource/timer-ti-32k.c @@ -21,7 +21,7 @@ * Roughly modelled after the OMAP1 MPU timer code. * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com> * - * Copyright (C) 2015 Texas Instruments Incorporated - http://www.ti.com + * Copyright (C) 2015 Texas Instruments Incorporated - https://www.ti.com */ #include <linux/clk.h> diff --git a/drivers/clocksource/timer-ti-dm.c b/drivers/clocksource/timer-ti-dm.c index 60aff087947a..33eeabf9c3d1 100644 --- a/drivers/clocksource/timer-ti-dm.c +++ b/drivers/clocksource/timer-ti-dm.c @@ -4,7 +4,7 @@ * * OMAP Dual-Mode Timers * - * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2010 Texas Instruments Incorporated - https://www.ti.com/ * Tarun Kanti DebBarma <tarun.kanti@ti.com> * Thara Gopinath <thara@ti.com> * -- 2.25.1 ^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH 15/16] dt-bindings: timer: Add Ingenic X1000 OST bindings. 2020-07-23 15:26 ` [PATCH 01/16] dt-bindings: atmel-tcb: convert bindings to json-schema Daniel Lezcano ` (2 preceding siblings ...) 2020-07-23 15:26 ` [PATCH 14/16] clocksource/drivers: Replace HTTP links with HTTPS ones Daniel Lezcano @ 2020-07-23 15:26 ` Daniel Lezcano 2020-07-27 14:04 ` [PATCH 01/16] dt-bindings: atmel-tcb: convert bindings to json-schema Lee Jones 4 siblings, 0 replies; 6+ messages in thread From: Daniel Lezcano @ 2020-07-23 15:26 UTC (permalink / raw) To: tglx Cc: 周琰杰 (Zhou Yanjie), 周正, Paul Cercueil, Rob Herring, Rob Herring, open list:CLOCKSOURCE, CLOCKEVENT DRIVERS, open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS From: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> Add the OST bindings for the X1000 SoC from Ingenic. Tested-by: 周正 (Zhou Zheng) <sernia.zhou@foxmail.com> Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> Reviewed-by: Paul Cercueil <paul@crapouillou.net> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/20200722171804.97559-2-zhouyanjie@wanyeetech.com --- .../bindings/timer/ingenic,sysost.yaml | 63 +++++++++++++++++++ include/dt-bindings/clock/ingenic,sysost.h | 12 ++++ 2 files changed, 75 insertions(+) create mode 100644 Documentation/devicetree/bindings/timer/ingenic,sysost.yaml create mode 100644 include/dt-bindings/clock/ingenic,sysost.h diff --git a/Documentation/devicetree/bindings/timer/ingenic,sysost.yaml b/Documentation/devicetree/bindings/timer/ingenic,sysost.yaml new file mode 100644 index 000000000000..df3eb76045e0 --- /dev/null +++ b/Documentation/devicetree/bindings/timer/ingenic,sysost.yaml @@ -0,0 +1,63 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/timer/ingenic,sysost.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Bindings for SYSOST in Ingenic XBurst family SoCs + +maintainers: + - 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> + +description: + The SYSOST in an Ingenic SoC provides one 64bit timer for clocksource + and one or more 32bit timers for clockevent. + +properties: + "#clock-cells": + const: 1 + + compatible: + enum: + - ingenic,x1000-ost + - ingenic,x2000-ost + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + clock-names: + const: ost + + interrupts: + maxItems: 1 + +required: + - "#clock-cells" + - compatible + - reg + - clocks + - clock-names + - interrupts + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/x1000-cgu.h> + + ost: timer@12000000 { + compatible = "ingenic,x1000-ost"; + reg = <0x12000000 0x3c>; + + #clock-cells = <1>; + + clocks = <&cgu X1000_CLK_OST>; + clock-names = "ost"; + + interrupt-parent = <&cpuintc>; + interrupts = <3>; + }; +... diff --git a/include/dt-bindings/clock/ingenic,sysost.h b/include/dt-bindings/clock/ingenic,sysost.h new file mode 100644 index 000000000000..9ac88e90babf --- /dev/null +++ b/include/dt-bindings/clock/ingenic,sysost.h @@ -0,0 +1,12 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * This header provides clock numbers for the ingenic,tcu DT binding. + */ + +#ifndef __DT_BINDINGS_CLOCK_INGENIC_OST_H__ +#define __DT_BINDINGS_CLOCK_INGENIC_OST_H__ + +#define OST_CLK_PERCPU_TIMER 0 +#define OST_CLK_GLOBAL_TIMER 1 + +#endif /* __DT_BINDINGS_CLOCK_INGENIC_OST_H__ */ -- 2.25.1 ^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH 01/16] dt-bindings: atmel-tcb: convert bindings to json-schema 2020-07-23 15:26 ` [PATCH 01/16] dt-bindings: atmel-tcb: convert bindings to json-schema Daniel Lezcano ` (3 preceding siblings ...) 2020-07-23 15:26 ` [PATCH 15/16] dt-bindings: timer: Add Ingenic X1000 OST bindings Daniel Lezcano @ 2020-07-27 14:04 ` Lee Jones 4 siblings, 0 replies; 6+ messages in thread From: Lee Jones @ 2020-07-27 14:04 UTC (permalink / raw) To: Daniel Lezcano Cc: tglx, Alexandre Belloni, Rob Herring, Rob Herring, Nicolas Ferre, Ludovic Desroches, open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS, moderated list:ARM/Microchip (AT91) SoC support, open list On Thu, 23 Jul 2020, Daniel Lezcano wrote: > From: Alexandre Belloni <alexandre.belloni@bootlin.com> > > Convert Atmel Timer Counter Blocks bindings to DT schema format using > json-schema. > > Also move it out of mfd as it is not and has never been related to mfd. > > Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> > Reviewed-by: Rob Herring <robh@kernel.org> > Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> > Link: https://lore.kernel.org/r/20200710230813.1005150-2-alexandre.belloni@bootlin.com > --- > .../devicetree/bindings/mfd/atmel-tcb.txt | 56 -------- Acked-by: Lee Jones <lee.jones@linaro.org> > .../soc/microchip/atmel,at91rm9200-tcb.yaml | 131 ++++++++++++++++++ > 2 files changed, 131 insertions(+), 56 deletions(-) > delete mode 100644 Documentation/devicetree/bindings/mfd/atmel-tcb.txt > create mode 100644 Documentation/devicetree/bindings/soc/microchip/atmel,at91rm9200-tcb.yaml -- Lee Jones [李琼斯] Senior Technical Lead - Developer Services Linaro.org │ Open source software for Arm SoCs Follow Linaro: Facebook | Twitter | Blog ^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2020-07-27 14:04 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
[not found] <1b1122f4-bce9-f349-e602-ed8e14cbb501@linaro.org>
2020-07-23 15:26 ` [PATCH 01/16] dt-bindings: atmel-tcb: convert bindings to json-schema Daniel Lezcano
2020-07-23 15:26 ` [PATCH 02/16] dt-bindings: microchip: atmel,at91rm9200-tcb: add sama5d2 compatible Daniel Lezcano
2020-07-23 15:26 ` [PATCH 03/16] ARM: dts: at91: sama5d2: add TCB GCLK Daniel Lezcano
2020-07-23 15:26 ` [PATCH 14/16] clocksource/drivers: Replace HTTP links with HTTPS ones Daniel Lezcano
2020-07-23 15:26 ` [PATCH 15/16] dt-bindings: timer: Add Ingenic X1000 OST bindings Daniel Lezcano
2020-07-27 14:04 ` [PATCH 01/16] dt-bindings: atmel-tcb: convert bindings to json-schema Lee Jones
This is a public inbox, see mirroring instructions for how to clone and mirror all data and code used for this inbox; as well as URLs for NNTP newsgroup(s).