From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.0 required=3.0 tests=BAYES_00, FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 300D6C433F2 for ; Thu, 23 Jul 2020 21:19:00 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 1884620825 for ; Thu, 23 Jul 2020 21:19:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727085AbgGWVSk (ORCPT ); Thu, 23 Jul 2020 17:18:40 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56450 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726304AbgGWVSj (ORCPT ); Thu, 23 Jul 2020 17:18:39 -0400 Received: from hera.iit.uni-miskolc.hu (hera.iit.uni-miskolc.hu [IPv6:2001:738:6001:500::4]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 982ECC0619DC; Thu, 23 Jul 2020 14:18:39 -0700 (PDT) Received: from localhost (localhost [127.0.0.1]) by hera.iit.uni-miskolc.hu (Postfix) with ESMTP id 06A74A12; Thu, 23 Jul 2020 23:10:29 +0200 (CEST) X-Virus-Scanned: Kamavis at iit.uni-miskolc.hu Received: from hera.iit.uni-miskolc.hu ([127.0.0.1]) by localhost (hera.iit.uni-miskolc.hu [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id Ae8prMPlSpa0; Thu, 23 Jul 2020 23:10:19 +0200 (CEST) Received: from titan.hitronhub.home (unknown [IPv6:2a02:8109:a180:908:226:9eff:fe30:2af8]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) (Authenticated sender: szucst@iit.uni-miskolc.hu) by hera.iit.uni-miskolc.hu (Postfix) with ESMTPSA id 33A04A0F; Thu, 23 Jul 2020 23:10:19 +0200 (CEST) From: =?UTF-8?q?Tam=C3=A1s=20Sz=C5=B1cs?= To: Rob Herring , Thierry Reding , Jonathan Hunter , Vidya Sagar , Lorenzo Pieralisi , JC Kuo , Sameer Pujar , devicetree@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org Cc: =?UTF-8?q?Tam=C3=A1s=20Sz=C5=B1cs?= Subject: [PATCH v2 1/4] arm64: tegra: Enable signal voltage switching on Tegra194 SDMMC1 and SDMMC3 Date: Thu, 23 Jul 2020 23:09:29 +0200 Message-Id: <20200723210932.8076-2-tszucs@protonmail.ch> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200723210932.8076-1-tszucs@protonmail.ch> References: <20200723210932.8076-1-tszucs@protonmail.ch> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add pad voltage configuration nodes for SDMMC pads with configurable voltages and enable supported SD card, SDIO and eMMC modes. Signed-off-by: Tamás Szűcs --- arch/arm64/boot/dts/nvidia/tegra194.dtsi | 45 ++++++++++++++++++++++++ 1 file changed, 45 insertions(+) diff --git a/arch/arm64/boot/dts/nvidia/tegra194.dtsi b/arch/arm64/boot/dts/nvidia/tegra194.dtsi index 48160f48003a..8351035bb6a7 100644 --- a/arch/arm64/boot/dts/nvidia/tegra194.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra194.dtsi @@ -4,6 +4,7 @@ #include #include #include +#include #include #include #include @@ -467,6 +468,9 @@ interconnects = <&mc TEGRA194_MEMORY_CLIENT_SDMMCRA &emc>, <&mc TEGRA194_MEMORY_CLIENT_SDMMCWA &emc>; interconnect-names = "dma-mem", "write"; + pinctrl-names = "sdmmc-3v3", "sdmmc-1v8"; + pinctrl-0 = <&sdmmc1_3v3>; + pinctrl-1 = <&sdmmc1_1v8>; nvidia,pad-autocal-pull-up-offset-3v3-timeout = <0x07>; nvidia,pad-autocal-pull-down-offset-3v3-timeout = @@ -478,6 +482,15 @@ nvidia,pad-autocal-pull-down-offset-sdr104 = <0x00>; nvidia,default-tap = <0x9>; nvidia,default-trim = <0x5>; + cap-sd-highspeed; + cap-mmc-highspeed; + sd-uhs-sdr12; + sd-uhs-sdr25; + sd-uhs-sdr50; + sd-uhs-sdr104; + cap-sdio-irq; + mmc-ddr-1_8v; + mmc-hs200-1_8v; status = "disabled"; }; @@ -492,6 +505,9 @@ interconnects = <&mc TEGRA194_MEMORY_CLIENT_SDMMCR &emc>, <&mc TEGRA194_MEMORY_CLIENT_SDMMCW &emc>; interconnect-names = "dma-mem", "write"; + pinctrl-names = "sdmmc-3v3", "sdmmc-1v8"; + pinctrl-0 = <&sdmmc3_3v3>; + pinctrl-1 = <&sdmmc3_1v8>; nvidia,pad-autocal-pull-up-offset-1v8 = <0x00>; nvidia,pad-autocal-pull-down-offset-1v8 = <0x7a>; nvidia,pad-autocal-pull-up-offset-3v3-timeout = <0x07>; @@ -504,6 +520,15 @@ nvidia,pad-autocal-pull-down-offset-sdr104 = <0x00>; nvidia,default-tap = <0x9>; nvidia,default-trim = <0x5>; + cap-sd-highspeed; + cap-mmc-highspeed; + sd-uhs-sdr12; + sd-uhs-sdr25; + sd-uhs-sdr50; + sd-uhs-sdr104; + cap-sdio-irq; + mmc-ddr-1_8v; + mmc-hs200-1_8v; status = "disabled"; }; @@ -1029,6 +1054,26 @@ #interrupt-cells = <2>; interrupt-controller; + + sdmmc1_3v3: sdmmc1-3v3 { + pins = "sdmmc1-hv"; + power-source = ; + }; + + sdmmc1_1v8: sdmmc1-1v8 { + pins = "sdmmc1-hv"; + power-source = ; + }; + + sdmmc3_3v3: sdmmc3-3v3 { + pins = "sdmmc3-hv"; + power-source = ; + }; + + sdmmc3_1v8: sdmmc3-1v8 { + pins = "sdmmc3-hv"; + power-source = ; + }; }; host1x@13e00000 { -- 2.20.1