From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.1 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5ECD2C433E1 for ; Mon, 17 Aug 2020 06:28:53 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 311C72072D for ; Mon, 17 Aug 2020 06:28:53 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1597645733; bh=zgG5YK7dMuJoaX/adKMs8azihNBpyM/EWQGkvgUQ3FM=; h=Date:From:To:Cc:Subject:References:In-Reply-To:List-ID:From; b=N89JCrFGcssCX41Ki2PAi+yFKB5ZKQLQE2FST1yhVnh+SuA6vkCQG1dlxT9jYWS4o e6qJjFEsgg2xEsvF/oy/E7JevsOou/E8cG5+siAzb3MHV5DJ05jhbh/+BWwUX09G5w lao4qMEwksOdmp/eMy2At8B8AMLXn/zVhYB+iyJY= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726496AbgHQG2w (ORCPT ); Mon, 17 Aug 2020 02:28:52 -0400 Received: from mail.kernel.org ([198.145.29.99]:45132 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726437AbgHQG2w (ORCPT ); Mon, 17 Aug 2020 02:28:52 -0400 Received: from localhost (unknown [122.171.38.130]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 9A30F2072D; Mon, 17 Aug 2020 06:28:50 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1597645731; bh=zgG5YK7dMuJoaX/adKMs8azihNBpyM/EWQGkvgUQ3FM=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=TNh6IclMsXLEQIkIYr87LuuVcBbMCb2ZEhGGkg7cD9XMw+48rhP7//JMe8w8/wZsD Wf7I5GC9Wp8CitVG5S3kcJZ2JkvUkYk/xS9LILOotAk9OfDWunApV7NJbEjS9clSUZ gR3qTZUyDeutkvhSf/GRiQMuVK9BVPVdb/S0KcfU= Date: Mon, 17 Aug 2020 11:58:47 +0530 From: Vinod Koul To: Serge Semin Cc: Viresh Kumar , Andy Shevchenko , Serge Semin , Alexey Malahov , Pavel Parkhomenko , Peter Ujfalusi , Andy Shevchenko , Rob Herring , dmaengine@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v2 0/5] dmaengine: dw: Introduce non-mem peripherals optimizations Message-ID: <20200817062847.GM2639@vkoul-mobl> References: <20200731200826.9292-1-Sergey.Semin@baikalelectronics.ru> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20200731200826.9292-1-Sergey.Semin@baikalelectronics.ru> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On 31-07-20, 23:08, Serge Semin wrote: > After a lot of tests and thorough DW DMAC databook studying we've > discovered that the driver can be optimized especially when it comes to > working with non-memory peripherals. > > First of all we've found out that since each DW DMAC channel can > be synthesized with different parameters, then even when two of them > are configured to perform the same DMA transactions they may execute them > with different performance. Since some DMA client devices might be > sensitive to such important parameter as performance, then it is a good > idea to let them request only suitable DMA channels. In this patchset we > introduce a functionality, which makes it possible by passing the DMA > channels mask either over the "dmas" DT property or in the dw_dma_slave > platform data descriptor. > > Secondly FIFO-mode of the "FIFO readiness" criterion is more suitable for > the pure memory DMA transfers, since it minimizes the system bus > utilization, but causes some performance drop. When it comes to working with > non-memory peripherals the DMA engine performance comes to the first > place. Since normally DMA client devices keep data in internal FIFOs, any > latency at some critical moment may cause a FIFO being overflown and > consequently losing data. So in order to minimize a chance of the DW DMAC > internal FIFO being a bottle neck during the DMA transfers to and from > non-memory peripherals we propose not to use FIFO-mode for them. > > Thirdly it has been discovered that using a DMA transaction length is > redundant when calculating the destination transfer width for the > dev-to-mem DMA communications. That shall increase performance of the DMA > transfers with unaligned data length. > > Finally there is a small optimization in the burst length setting. In > particular we've found out, that according to the DW DMAC databoot it's > pointless to set one for the memory peripherals since they don't have > handshaking interface connected to the DMA controller. So we suggest to > just ignore the burst length config when it comes to setting the memory > peripherals up. Applied all, thanks -- ~Vinod