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From: Sam Ravnborg <sam@ravnborg.org>
To: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>,
	Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Neil Armstrong <narmstrong@baylibre.com>,
	Xinliang Liu <xinliang.liu@linaro.org>,
	Wanchun Zheng <zhengwanchun@hisilicon.com>,
	linuxarm@huawei.com, dri-devel <dri-devel@lists.freedesktop.org>,
	Andrzej Hajda <a.hajda@samsung.com>,
	Laurent Pinchart <laurent.pinchart@ideasonboard.com>,
	devel@driverdev.osuosl.org,
	Daniel Borkmann <daniel@iogearbox.net>,
	John Fastabend <john.fastabend@gmail.com>,
	Xiubin Zhang <zhangxiubin1@huawei.com>,
	Wei Xu <xuwei5@hisilicon.com>, David Airlie <airlied@linux.ie>,
	Xinwei Kong <kong.kongxinwei@hisilicon.com>,
	Tomi Valkeinen <tomi.valkeinen@ti.com>,
	Bogdan Togorean <bogdan.togorean@analog.com>,
	Laurentiu Palcu <laurentiu.palcu@nxp.com>,
	linux-media@vger.kernel.org, devicetree@vger.kernel.org,
	Liwei Cai <cailiwei@hisilicon.com>,
	Jesper Dangaard Brouer <hawk@kernel.org>,
	Manivannan Sadhasivam <mani@kernel.org>,
	Chen Feng <puck.chen@hisilicon.com>,
	Alexei Starovoitov <ast@kernel.org>,
	linaro-mm-sig@lists.linaro.org, Rob Herring <robh+dt@kernel.org>,
	Jakub Kicinski <kuba@kernel.org>,
	mauro.chehab@huawei.com, Rob Clark <robdclark@chromium.org>,
	linux-arm-kernel@lists.infradead.org, netdev@vger.kernel.org,
	linux-kernel@vger.kernel.org, Liuyao An <anliuyao@huawei.com>,
	Rongrong Zou <zourongrong@gmail.com>,
	bpf@vger.kernel.org, "David S. Miller" <davem@davemloft.net>
Subject: Re: [PATCH 00/49] DRM driver for Hikey 970
Date: Tue, 25 Aug 2020 22:21:53 +0200	[thread overview]
Message-ID: <20200825202153.GA237836@ravnborg.org> (raw)
In-Reply-To: <20200824180225.1a515b6a@coco.lan>

Hi Mauro.

Laurent and I discussed this driver a little on irc.
Some highlights:

This parts could use register names:
+       writel(0x2, noc_dss_base + 0xc);
+       writel(0x2, noc_dss_base + 0x8c);
+       writel(0x2, noc_dss_base + 0x10c);
+       writel(0x2, noc_dss_base + 0x18c);

The two nodes in the DT for DPE and DSI uses overlapping range for reg
entries. It looks like a syscon node or some iommu thing is needed to do
this properly.

The chain will lok like this:

DPE -> DSI -> video mux -> {adv7533, panel}

But drm_bridge has not yet support for such non-linear setup.
The recommendation is to focus on the HDMI prat. Then we can later
come up with support for a video mux.

The video mux should have a dedicated node with one input node and two
output nodes. Which is also where the gpio should be.

The DSI node references two DPHY instances - should it be PHY driver(s)?

Does the DSI part contain one or two instances. Clocks looks duplicated.

Does the DPE and DSI share a lot of register blocks - or does it just
look like this from a first point of view?

You can read though the logs here:
https://people.freedesktop.org/~cbrill/dri-log/index.php

Could you please try to get back on some of the points above so we can
help you move forward in the right direction.

Thanks,
	Sam

  parent reply	other threads:[~2020-08-25 20:22 UTC|newest]

Thread overview: 52+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-08-19 11:45 [PATCH 00/49] DRM driver for Hikey 970 Mauro Carvalho Chehab
2020-08-19 11:46 ` [PATCH 44/49] dts: hisilicon: hi3670.dtsi: add I2C settings Mauro Carvalho Chehab
2020-08-19 11:46 ` [PATCH 45/49] dts: hikey970-pinctrl.dtsi: add missing pinctrl settings Mauro Carvalho Chehab
2020-08-19 11:46 ` [PATCH 46/49] dt: hisilicon: add support for the PMIC found on Hikey 970 Mauro Carvalho Chehab
2020-08-19 11:46 ` [PATCH 47/49] dts: add support for Hikey 970 DRM Mauro Carvalho Chehab
2020-08-19 11:46 ` [PATCH 48/49] staging: hikey9xx/gpu: drop kirin9xx_pwm Mauro Carvalho Chehab
2020-08-19 11:46 ` [PATCH 49/49] dt: display: Add binds for the DPE and DSI controller for Kirin 960/970 Mauro Carvalho Chehab
2020-08-19 21:02   ` Sam Ravnborg
2020-08-19 22:36   ` Rob Herring
2020-08-19 15:21 ` [PATCH 00/49] DRM driver for Hikey 970 Sam Ravnborg
2020-08-19 15:30   ` Laurent Pinchart
2020-08-19 19:52     ` John Stultz
2020-08-20  7:03       ` Mauro Carvalho Chehab
2020-08-20 10:02         ` Laurent Pinchart
2020-08-24 19:29           ` Dave Airlie
2020-08-25 11:30             ` Mauro Carvalho Chehab
2020-08-25 11:38               ` Laurent Pinchart
2020-08-25 12:31               ` Daniel Stone
2020-08-26 14:44               ` Nicolas Dufresne
2020-08-19 15:40   ` Mauro Carvalho Chehab
2020-08-19 17:35     ` Sam Ravnborg
2020-08-20 14:06       ` Mauro Carvalho Chehab
2020-08-20 14:48         ` Sam Ravnborg
2020-08-20 15:13           ` Mauro Carvalho Chehab
2020-08-20 15:36             ` Sam Ravnborg
2020-08-21 13:37       ` Mauro Carvalho Chehab
2020-08-21 13:58       ` Mauro Carvalho Chehab
2020-08-21 15:55         ` Sam Ravnborg
2020-08-24 16:02           ` Mauro Carvalho Chehab
2020-08-24 18:45             ` Sam Ravnborg
2020-08-24 21:10             ` Sam Ravnborg
2020-08-24 21:24             ` Sam Ravnborg
2020-08-25 18:11             ` Sam Ravnborg
2020-08-25 20:21             ` Sam Ravnborg [this message]
2020-08-21 14:41       ` Mauro Carvalho Chehab
2020-08-21 15:56         ` Sam Ravnborg
2020-08-24 16:06           ` Mauro Carvalho Chehab
2020-08-19 20:48     ` Sam Ravnborg
2020-08-20  7:21       ` Michel Dänzer
2020-08-20  7:21       ` Mauro Carvalho Chehab
2020-08-21 16:09       ` Joe Perches
2020-08-19 21:13 ` John Stultz
2020-08-19 21:25   ` Sam Ravnborg
2020-08-20  6:40     ` Mauro Carvalho Chehab
2020-08-20  6:34   ` Mauro Carvalho Chehab
2020-08-19 21:36 ` John Stultz
2020-08-20  2:01   ` John Stultz
2020-08-20  3:28     ` John Stultz
2020-08-20  7:48       ` Mauro Carvalho Chehab
2020-08-24  6:49       ` Mauro Carvalho Chehab
2020-08-24 13:18         ` Mauro Carvalho Chehab
2020-08-20  8:04   ` Mauro Carvalho Chehab

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