From: Florian Fainelli <f.fainelli@gmail.com>
To: netdev@vger.kernel.org
Cc: Florian Fainelli <f.fainelli@gmail.com>,
andrew@lunn.ch, adam.rudzinski@arf.net.pl,
m.felsch@pengutronix.de, hkallweit1@gmail.com,
richard.leitner@skidata.com, zhengdejin5@gmail.com,
devicetree@vger.kernel.org, kernel@pengutronix.de,
kuba@kernel.org, robh+dt@kernel.org
Subject: [RFC net-next 2/2] net: phy: bcm7xxx: request and manage GPHY clock
Date: Wed, 2 Sep 2020 14:33:47 -0700 [thread overview]
Message-ID: <20200902213347.3177881-3-f.fainelli@gmail.com> (raw)
In-Reply-To: <20200902213347.3177881-1-f.fainelli@gmail.com>
The internal Gigabit PHY on Broadcom STB chips has a digital clock which
drives its MDIO interface among other things, the driver now requests
and manage that clock during .probe() and .remove() accordingly.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
drivers/net/phy/bcm7xxx.c | 29 ++++++++++++++++++++++++++++-
1 file changed, 28 insertions(+), 1 deletion(-)
diff --git a/drivers/net/phy/bcm7xxx.c b/drivers/net/phy/bcm7xxx.c
index 692048d86ab1..2b81a11e3167 100644
--- a/drivers/net/phy/bcm7xxx.c
+++ b/drivers/net/phy/bcm7xxx.c
@@ -11,6 +11,8 @@
#include "bcm-phy-lib.h"
#include <linux/bitops.h>
#include <linux/brcmphy.h>
+#include <linux/clk.h>
+#include <linux/clk-provider.h>
#include <linux/mdio.h>
/* Broadcom BCM7xxx internal PHY registers */
@@ -39,6 +41,7 @@
struct bcm7xxx_phy_priv {
u64 *stats;
+ struct clk *clk;
};
static int bcm7xxx_28nm_d0_afe_config_init(struct phy_device *phydev)
@@ -521,6 +524,7 @@ static void bcm7xxx_28nm_get_phy_stats(struct phy_device *phydev,
static int bcm7xxx_28nm_probe(struct phy_device *phydev)
{
struct bcm7xxx_phy_priv *priv;
+ int ret = 0;
priv = devm_kzalloc(&phydev->mdio.dev, sizeof(*priv), GFP_KERNEL);
if (!priv)
@@ -534,7 +538,28 @@ static int bcm7xxx_28nm_probe(struct phy_device *phydev)
if (!priv->stats)
return -ENOMEM;
- return 0;
+ priv->clk = devm_clk_get_optional(&phydev->mdio.dev, "sw_gphy");
+ if (IS_ERR(priv->clk))
+ return PTR_ERR(priv->clk);
+
+ /* To get there, the mdiobus registration logic already enabled our
+ * clock otherwise we would not have probed this device since we would
+ * not be able to read its ID. To avoid artificially bumping up the
+ * clock reference count, only do the clock enable from a phy_remove ->
+ * phy_probe path (driver unbind, then rebind).
+ */
+ if (!__clk_is_enabled(priv->clk))
+ ret = clk_prepare_enable(priv->clk);
+
+ return ret;
+}
+
+static void bcm7xxx_28nm_remove(struct phy_device *phydev)
+{
+ struct bcm7xxx_phy_priv *priv = phydev->priv;
+
+ clk_disable_unprepare(priv->clk);
+ devm_clk_put(&phydev->mdio.dev, priv->clk);
}
#define BCM7XXX_28NM_GPHY(_oui, _name) \
@@ -552,6 +577,7 @@ static int bcm7xxx_28nm_probe(struct phy_device *phydev)
.get_strings = bcm_phy_get_strings, \
.get_stats = bcm7xxx_28nm_get_phy_stats, \
.probe = bcm7xxx_28nm_probe, \
+ .remove = bcm7xxx_28nm_remove, \
}
#define BCM7XXX_28NM_EPHY(_oui, _name) \
@@ -567,6 +593,7 @@ static int bcm7xxx_28nm_probe(struct phy_device *phydev)
.get_strings = bcm_phy_get_strings, \
.get_stats = bcm7xxx_28nm_get_phy_stats, \
.probe = bcm7xxx_28nm_probe, \
+ .remove = bcm7xxx_28nm_remove, \
}
#define BCM7XXX_40NM_EPHY(_oui, _name) \
--
2.25.1
next prev parent reply other threads:[~2020-09-02 21:34 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-09-02 21:33 [RFC net-next 0/2] net: phy: Support enabling clocks prior to bus probe Florian Fainelli
2020-09-02 21:33 ` [RFC net-next 1/2] " Florian Fainelli
2020-09-02 21:38 ` Florian Fainelli
2020-09-02 22:11 ` Andrew Lunn
2020-09-02 21:33 ` Florian Fainelli [this message]
2020-09-02 22:20 ` [RFC net-next 2/2] net: phy: bcm7xxx: request and manage GPHY clock Andrew Lunn
2020-09-03 2:13 ` Florian Fainelli
2020-09-03 6:00 ` Adam Rudziński
2020-09-03 15:21 ` Florian Fainelli
2020-09-03 17:13 ` Adam Rudziński
2020-09-03 17:17 ` Florian Fainelli
2020-09-03 19:21 ` Adam Rudziński
2020-09-03 19:35 ` Florian Fainelli
2020-09-03 20:09 ` Adam Rudziński
2020-09-03 20:17 ` Florian Fainelli
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