From: Krzysztof Kozlowski <krzk@kernel.org>
To: Rob Herring <robh+dt@kernel.org>, Shawn Guo <shawnguo@kernel.org>,
Sascha Hauer <s.hauer@pengutronix.de>,
Pengutronix Kernel Team <kernel@pengutronix.de>,
Fabio Estevam <festevam@gmail.com>,
NXP Linux Team <linux-imx@nxp.com>,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Cc: Krzysztof Kozlowski <krzk@kernel.org>
Subject: [PATCH v2 01/14] arm64: dts: imx8mm-beacon: Align pin configuration group names with schema
Date: Fri, 4 Sep 2020 08:27:30 +0200 [thread overview]
Message-ID: <20200904062743.6273-1-krzk@kernel.org> (raw)
Device tree schema expects pin configuration groups to end with 'grp'
suffix. This fixes dtbs_check warnings like:
pinctrl@30330000: 'pcal6414-gpio', 'pmicirq', 'usdhc1grp100mhz', 'usdhc1grp200mhz', 'usdhc1grpgpio',
'usdhc2grp100mhz', 'usdhc2grp200mhz', 'usdhc2grpgpio', 'usdhc3grp100mhz', 'usdhc3grp200mhz'
do not match any of the regexes: 'grp$', 'pinctrl-[0-9]+'
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
---
.../boot/dts/freescale/imx8mm-beacon-baseboard.dtsi | 8 ++++----
arch/arm64/boot/dts/freescale/imx8mm-beacon-som.dtsi | 12 ++++++------
2 files changed, 10 insertions(+), 10 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-beacon-baseboard.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-beacon-baseboard.dtsi
index 5b5af8b381df..d6b9dedd168f 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-beacon-baseboard.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm-beacon-baseboard.dtsi
@@ -210,7 +210,7 @@
>;
};
- pinctrl_pcal6414: pcal6414-gpio {
+ pinctrl_pcal6414: pcal6414-gpiogrp {
fsl,pins = <
MX8MM_IOMUXC_SAI2_MCLK_GPIO4_IO27 0x19
>;
@@ -240,7 +240,7 @@
>;
};
- pinctrl_usdhc2_gpio: usdhc2grpgpio {
+ pinctrl_usdhc2_gpio: usdhc2gpiogrp {
fsl,pins = <
MX8MM_IOMUXC_SD2_CD_B_USDHC2_CD_B 0x41
MX8MM_IOMUXC_SD2_RESET_B_GPIO2_IO19 0x41
@@ -259,7 +259,7 @@
>;
};
- pinctrl_usdhc2_100mhz: usdhc2grp100mhz {
+ pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
fsl,pins = <
MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x194
MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d4
@@ -271,7 +271,7 @@
>;
};
- pinctrl_usdhc2_200mhz: usdhc2grp200mhz {
+ pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
fsl,pins = <
MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x196
MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d6
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-beacon-som.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-beacon-som.dtsi
index 620a124dfb5f..502faf6144b0 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-beacon-som.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm-beacon-som.dtsi
@@ -290,7 +290,7 @@
>;
};
- pinctrl_pmic: pmicirq {
+ pinctrl_pmic: pmicirqgrp {
fsl,pins = <
MX8MM_IOMUXC_GPIO1_IO03_GPIO1_IO3 0x41
>;
@@ -309,7 +309,7 @@
>;
};
- pinctrl_usdhc1_gpio: usdhc1grpgpio {
+ pinctrl_usdhc1_gpio: usdhc1gpiogrp {
fsl,pins = <
MX8MM_IOMUXC_SD1_RESET_B_GPIO2_IO10 0x41
>;
@@ -326,7 +326,7 @@
>;
};
- pinctrl_usdhc1_100mhz: usdhc1grp100mhz {
+ pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp {
fsl,pins = <
MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK 0x194
MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD 0x1d4
@@ -337,7 +337,7 @@
>;
};
- pinctrl_usdhc1_200mhz: usdhc1grp200mhz {
+ pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp {
fsl,pins = <
MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK 0x196
MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD 0x1d6
@@ -364,7 +364,7 @@
>;
};
- pinctrl_usdhc3_100mhz: usdhc3grp100mhz {
+ pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp {
fsl,pins = <
MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x194
MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d4
@@ -380,7 +380,7 @@
>;
};
- pinctrl_usdhc3_200mhz: usdhc3grp200mhz {
+ pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp {
fsl,pins = <
MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x196
MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d6
--
2.17.1
next reply other threads:[~2020-09-04 6:27 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-09-04 6:27 Krzysztof Kozlowski [this message]
2020-09-04 6:27 ` [PATCH v2 02/14] arm64: dts: imx8mm-evk: Add 32.768 kHz clock to PMIC Krzysztof Kozlowski
2020-09-04 6:27 ` [PATCH v2 03/14] arm64: dts: imx8mm-evk: Align pin configuration group names with schema Krzysztof Kozlowski
2020-09-04 6:27 ` [PATCH v2 04/14] arm64: dts: imx8mm-ddr4-evk: " Krzysztof Kozlowski
2020-09-04 6:27 ` [PATCH v2 05/14] arm64: dts: imx8mn-ddr4-evk: Align regulator " Krzysztof Kozlowski
2020-09-04 6:27 ` [PATCH v2 06/14] arm64: dts: imx8mn-evk: Align pin configuration group " Krzysztof Kozlowski
2020-09-04 6:27 ` [PATCH v2 07/14] arm64: dts: imx8mq-evk: " Krzysztof Kozlowski
2020-09-04 6:27 ` [PATCH v2 08/14] arm64: dts: imx8mq-librem5-devkit: " Krzysztof Kozlowski
2020-09-04 6:27 ` [PATCH v2 09/14] arm64: dts: imx8mq-phanbell: " Krzysztof Kozlowski
2020-09-04 6:27 ` [PATCH v2 10/14] arm64: dts: imx8mq-pico-pi: " Krzysztof Kozlowski
2020-09-04 6:27 ` [PATCH v2 11/14] arm64: dts: imx8mq-sr-som: " Krzysztof Kozlowski
2020-09-04 6:27 ` [PATCH v2 12/14] arm64: dts: imx8mq-hummingboard-pulse: " Krzysztof Kozlowski
2020-09-04 6:27 ` [PATCH v2 13/14] arm64: dts: imx8qxp-colibri: " Krzysztof Kozlowski
2020-09-04 6:27 ` [PATCH v2 14/14] ARM: dts: imx28-m28: Align GPMI NAND node name " Krzysztof Kozlowski
2020-09-05 8:05 ` Shawn Guo
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