From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.1 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id EAA56C433E2 for ; Fri, 4 Sep 2020 06:28:41 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id A450D207EA for ; Fri, 4 Sep 2020 06:28:41 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1599200921; bh=4XlFYSUqyUgXNY2lTOdDnWrKsSE6d2W+mwPpeXHRPfc=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=l9LNX56MUIJhd8lObaqxSneB69LYe3KnlZ9T5Ij+A4PCgpc8J7JyypQKMfnqjz2g8 QqFxiPfrmKaWbEXL/8FjfpPuTIiAIcxlSEUq6c7PLIvGPm/sjMkvfKIr4BwoRwj/aB 4XL64/1E65/bPz/PA784uLWK2gtEZzpMQTp/T4l4= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729767AbgIDG2c (ORCPT ); Fri, 4 Sep 2020 02:28:32 -0400 Received: from mail.kernel.org ([198.145.29.99]:46776 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729655AbgIDG2b (ORCPT ); Fri, 4 Sep 2020 02:28:31 -0400 Received: from kozik-lap.mshome.net (unknown [194.230.155.106]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id D688C2074D; Fri, 4 Sep 2020 06:28:28 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1599200911; bh=4XlFYSUqyUgXNY2lTOdDnWrKsSE6d2W+mwPpeXHRPfc=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=BZM7RW7y9SWrCq0RK5Mw0QV6RYtPJT1D94l6ZCQMxR5iWntEoGwvz1l1RoCAPhEfW lD7mSVGsN5K4m0JHh9WdsFRSX9jekp/pq+dfD2IjEd/u6a/YUI/Jh7RZnz60GA/2I9 0WuGyeKIOZYEk6P7G1ajSu+eFUsE4F3H3lBcpTdo= From: Krzysztof Kozlowski To: Rob Herring , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Krzysztof Kozlowski Subject: [PATCH v2 13/14] arm64: dts: imx8qxp-colibri: Align pin configuration group names with schema Date: Fri, 4 Sep 2020 08:27:42 +0200 Message-Id: <20200904062743.6273-13-krzk@kernel.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200904062743.6273-1-krzk@kernel.org> References: <20200904062743.6273-1-krzk@kernel.org> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Device tree schema expects pin configuration groups to end with 'grp' suffix, otherwise dtbs_check complain with a warning like: ... do not match any of the regexes: 'grp$', 'pinctrl-[0-9]+' Signed-off-by: Krzysztof Kozlowski --- arch/arm64/boot/dts/freescale/imx8qxp-colibri.dtsi | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/imx8qxp-colibri.dtsi b/arch/arm64/boot/dts/freescale/imx8qxp-colibri.dtsi index 75f17a29f81e..f38acff0d25c 100644 --- a/arch/arm64/boot/dts/freescale/imx8qxp-colibri.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8qxp-colibri.dtsi @@ -494,7 +494,7 @@ >; }; - pinctrl_usdhc1_100mhz: usdhc1grp100mhz { + pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp { fsl,pins = < IMX8QXP_EMMC0_CLK_CONN_EMMC0_CLK 0x06000041 IMX8QXP_EMMC0_CMD_CONN_EMMC0_CMD 0x21 @@ -511,7 +511,7 @@ >; }; - pinctrl_usdhc1_200mhz: usdhc1grp200mhz { + pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp { fsl,pins = < IMX8QXP_EMMC0_CLK_CONN_EMMC0_CLK 0x06000041 IMX8QXP_EMMC0_CMD_CONN_EMMC0_CMD 0x21 @@ -554,7 +554,7 @@ >; }; - pinctrl_usdhc2_100mhz: usdhc2grp100mhz { + pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp { fsl,pins = < IMX8QXP_USDHC1_CLK_CONN_USDHC1_CLK 0x06000041 /* SODIMM 47 */ IMX8QXP_USDHC1_CMD_CONN_USDHC1_CMD 0x21 /* SODIMM 190 */ @@ -566,7 +566,7 @@ >; }; - pinctrl_usdhc2_200mhz: usdhc2grp200mhz { + pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp { fsl,pins = < IMX8QXP_USDHC1_CLK_CONN_USDHC1_CLK 0x06000041 /* SODIMM 47 */ IMX8QXP_USDHC1_CMD_CONN_USDHC1_CMD 0x21 /* SODIMM 190 */ -- 2.17.1