From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.4 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_SANE_1 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 26CEAC433E2 for ; Tue, 8 Sep 2020 13:14:00 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id DC7B523BCF for ; Tue, 8 Sep 2020 13:13:59 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="zL6F4Vrp" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729189AbgIHNN4 (ORCPT ); Tue, 8 Sep 2020 09:13:56 -0400 Received: from fllv0016.ext.ti.com ([198.47.19.142]:43942 "EHLO fllv0016.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729941AbgIHL0K (ORCPT ); Tue, 8 Sep 2020 07:26:10 -0400 Received: from lelv0266.itg.ti.com ([10.180.67.225]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 088BPYo0125649; Tue, 8 Sep 2020 06:25:34 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1599564334; bh=ma5FyqGZzBv1gBvZ6mKpGD4wkyeCYZk4WZHIeT6RzQ0=; h=Date:From:To:CC:Subject:References:In-Reply-To; b=zL6F4VrpL8vE5XQemBuoDuzb5SICWAuJ7B7FYKqmfcJYCKJFvmiDHEybu2r9/yPSa CIhde4yH0GdynLKmnSmLKYa1TSI+G3hxxW58MULRHU+2ptuffL4RyZ8eKFzIAtxNKt eyyUsJjjMtYPSrEqpzEZcBef4FzZR4asqpfiV33c= Received: from DLEE114.ent.ti.com (dlee114.ent.ti.com [157.170.170.25]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 088BPYR5062754 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 8 Sep 2020 06:25:34 -0500 Received: from DLEE101.ent.ti.com (157.170.170.31) by DLEE114.ent.ti.com (157.170.170.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3; Tue, 8 Sep 2020 06:25:34 -0500 Received: from fllv0040.itg.ti.com (10.64.41.20) by DLEE101.ent.ti.com (157.170.170.31) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via Frontend Transport; Tue, 8 Sep 2020 06:25:34 -0500 Received: from localhost (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id 088BPYOu130695; Tue, 8 Sep 2020 06:25:34 -0500 Date: Tue, 8 Sep 2020 06:25:34 -0500 From: Nishanth Menon To: Tero Kristo CC: Lokesh Vutla , Rob Herring , Linux ARM Mailing List , Device Tree Mailing List , Sekhar Nori , Suman Anna , Grygorii Strashko Subject: Re: [PATCH v2 0/4] arm64: Initial support for Texas Instrument's J7200 Platform Message-ID: <20200908112534.t5bgrjf7y3a6l2ss@akan> References: <20200827065144.17683-1-lokeshvutla@ti.com> <20200907141427.ti6r3h6namv2hezw@akan> <9d8d6980-0b22-da45-52af-474c6d96c873@ti.com> <20200907234833.r376hhl64q55gd7o@akan> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: User-Agent: NeoMutt/20171215 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On 12:55-20200908, Tero Kristo wrote: > On 08/09/2020 02:48, Nishanth Menon wrote: > > On 19:53-20200907, Lokesh Vutla wrote: > > > > [... I should have responded to the correct patch..] > > > > Besides yaml and compatibility acks, there are a few ancillary > > > > comments to fix up.. Kconfig -> I think we should either stay with > > > > status quo and create a new config option per SoC OR rename the > > > > config to be generic (using j7200 with j721e SoC config is not very > > > > > > Please suggest your preference here. I guess separate defconfig for J7200? > > > > > > I was just scanning through remaining arm64 additions to see what others have > > done. We seem to have two options here: > > a) Just use ARCH_K3 and no specific SoC configs > > b) Specific SoC configs > > In both cases, use += instead of \ to incrementally add dtbs > > > > We have been going with (b) so far, Tero: any specific preference here? > > > > (a) has the aspect of simplicity and reduced dependencies. > > (b) Allows downstream kernels to save just a little bit and focus purely > > on SoC of interest. > > If possible, I think we should aim for a) at least for now. We have the soc > type detection code in place anyways that can be used on driver level. > Creating compile time flags should be avoided imo as much as possible and > just go with runtime detection. I can't see why saving maybe a megabyte of > memory with SoC specific kernels would be of any importance on K3 arch with > the memory amounts we have in our disposal. Agreed on (a). I see one other user (SND) beyond dtb Makefile, So, to order this right, lets first switch the users over from SOC config builds to ARCH_K3, before we drop the Kconfig definition/defconfig update in a follow on rc/version. -- Regards, Nishanth Menon Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D