From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.1 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 92E05C10DAA for ; Wed, 9 Sep 2020 17:18:12 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 4001E21D94 for ; Wed, 9 Sep 2020 17:18:12 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1599671892; bh=N/D7fR7BGgOx2lZpaHNGW+Rl2JGBL1AiJ7z668klV+c=; h=From:To:Subject:Date:In-Reply-To:References:List-ID:From; b=UxQxMfj5+cGhIx+WcF4/AmzWQqxXui5GUDiMPzab1xYmpf15OnjdrvAW+L0XxXhVh hvTtSp3l7bi9p2ZnfazB6OACc6I5nQZssomocpJYNfzR0Qm+847p1tuZr2yGt53awN avwlNwAAxIzZhnd0wyaIgTHfL0KicpBnWtwVSH9Y= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730233AbgIIRR3 (ORCPT ); Wed, 9 Sep 2020 13:17:29 -0400 Received: from mail.kernel.org ([198.145.29.99]:54558 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729717AbgIIP2A (ORCPT ); Wed, 9 Sep 2020 11:28:00 -0400 Received: from kozik-lap.mshome.net (unknown [194.230.155.174]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id B79F022283; Wed, 9 Sep 2020 15:18:04 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1599664687; bh=N/D7fR7BGgOx2lZpaHNGW+Rl2JGBL1AiJ7z668klV+c=; h=From:To:Subject:Date:In-Reply-To:References:From; b=slbCvm8U9lnMRQ+hYn/j7ofXUJ13IRFPxhcVUHN1f8DL+IaFG+Ya316Ugp94pgsLs jxEDbN4cgxppFXnS7x2Qg3d9KlFoiCLKsbwkNh2FDiXRKMdRJDAfJ6+hQV42yv099P 5vZDq1/udt0+KpTcENIgTTFXEUjgIX+juo6fXGMs= From: Krzysztof Kozlowski To: Rob Herring , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , Krzysztof Kozlowski , Anson Huang , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH 2/3] arm64: dts: imx8mm-var-som-symphony: Adjust ethernet pin configuration Date: Wed, 9 Sep 2020 17:17:54 +0200 Message-Id: <20200909151755.17783-2-krzk@kernel.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200909151755.17783-1-krzk@kernel.org> References: <20200909151755.17783-1-krzk@kernel.org> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The Symphony board uses GPIO from expander as Ethernet PHY reset pin, not the GPIO1_IO9. Signed-off-by: Krzysztof Kozlowski --- .../dts/freescale/imx8mm-var-som-symphony.dts | 20 +++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8mm-var-som-symphony.dts b/arch/arm64/boot/dts/freescale/imx8mm-var-som-symphony.dts index 1c427260e887..07214d7dfc06 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm-var-som-symphony.dts +++ b/arch/arm64/boot/dts/freescale/imx8mm-var-som-symphony.dts @@ -181,6 +181,26 @@ status = "disabled"; }; +&pinctrl_fec1 { + fsl,pins = < + MX8MM_IOMUXC_ENET_MDC_ENET1_MDC 0x3 + MX8MM_IOMUXC_ENET_MDIO_ENET1_MDIO 0x3 + MX8MM_IOMUXC_ENET_TD3_ENET1_RGMII_TD3 0x1f + MX8MM_IOMUXC_ENET_TD2_ENET1_RGMII_TD2 0x1f + MX8MM_IOMUXC_ENET_TD1_ENET1_RGMII_TD1 0x1f + MX8MM_IOMUXC_ENET_TD0_ENET1_RGMII_TD0 0x1f + MX8MM_IOMUXC_ENET_RD3_ENET1_RGMII_RD3 0x91 + MX8MM_IOMUXC_ENET_RD2_ENET1_RGMII_RD2 0x91 + MX8MM_IOMUXC_ENET_RD1_ENET1_RGMII_RD1 0x91 + MX8MM_IOMUXC_ENET_RD0_ENET1_RGMII_RD0 0x91 + MX8MM_IOMUXC_ENET_TXC_ENET1_RGMII_TXC 0x1f + MX8MM_IOMUXC_ENET_RXC_ENET1_RGMII_RXC 0x91 + MX8MM_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL 0x91 + MX8MM_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL 0x1f + /* Remove the MX8MM_IOMUXC_GPIO1_IO09_GPIO1_IO9 as not used */ + >; +}; + &iomuxc { pinctrl_captouch: captouchgrp { fsl,pins = < -- 2.17.1