From: Bjorn Andersson <bjorn.andersson@linaro.org>
To: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Cc: Andy Gross <agross@kernel.org>, Rob Herring <robh+dt@kernel.org>,
linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Subject: Re: [PATCH] arm64: dts: sm8250: Add OPP table for all qup devices
Date: Tue, 15 Sep 2020 15:08:55 +0000 [thread overview]
Message-ID: <20200915150855.GB478@uller> (raw)
In-Reply-To: <20200915120203.290295-1-dmitry.baryshkov@linaro.org>
On Tue 15 Sep 12:02 UTC 2020, Dmitry Baryshkov wrote:
> qup has a requirement to vote on the performance state of the CX domain
> in sm8250 devices. Add OPP tables for these and also add power-domains
> property for all qup instances for uart and spi.
> i2c does not support scaling and uses a fixed clock.
>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Applied
Thanks,
Bjorn
> ---
> arch/arm64/boot/dts/qcom/sm8250.dtsi | 69 ++++++++++++++++++++++++++++
> 1 file changed, 69 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi
> index c989bc1370ab..6cd45a667ba9 100644
> --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
> @@ -411,6 +411,25 @@ ipcc: mailbox@408000 {
> #mbox-cells = <2>;
> };
>
> + qup_opp_table: qup-opp-table {
> + compatible = "operating-points-v2";
> +
> + opp-50000000 {
> + opp-hz = /bits/ 64 <50000000>;
> + required-opps = <&rpmhpd_opp_min_svs>;
> + };
> +
> + opp-75000000 {
> + opp-hz = /bits/ 64 <75000000>;
> + required-opps = <&rpmhpd_opp_low_svs>;
> + };
> +
> + opp-120000000 {
> + opp-hz = /bits/ 64 <120000000>;
> + required-opps = <&rpmhpd_opp_svs>;
> + };
> + };
> +
> qupv3_id_2: geniqup@8c0000 {
> compatible = "qcom,geni-se-qup";
> reg = <0x0 0x008c0000 0x0 0x6000>;
> @@ -445,6 +464,8 @@ spi14: spi@880000 {
> interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
> #address-cells = <1>;
> #size-cells = <0>;
> + power-domains = <&rpmhpd SM8250_CX>;
> + operating-points-v2 = <&qup_opp_table>;
> status = "disabled";
> };
>
> @@ -471,6 +492,8 @@ spi15: spi@884000 {
> interrupts = <GIC_SPI 583 IRQ_TYPE_LEVEL_HIGH>;
> #address-cells = <1>;
> #size-cells = <0>;
> + power-domains = <&rpmhpd SM8250_CX>;
> + operating-points-v2 = <&qup_opp_table>;
> status = "disabled";
> };
>
> @@ -497,6 +520,8 @@ spi16: spi@888000 {
> interrupts = <GIC_SPI 584 IRQ_TYPE_LEVEL_HIGH>;
> #address-cells = <1>;
> #size-cells = <0>;
> + power-domains = <&rpmhpd SM8250_CX>;
> + operating-points-v2 = <&qup_opp_table>;
> status = "disabled";
> };
>
> @@ -523,6 +548,8 @@ spi17: spi@88c000 {
> interrupts = <GIC_SPI 585 IRQ_TYPE_LEVEL_HIGH>;
> #address-cells = <1>;
> #size-cells = <0>;
> + power-domains = <&rpmhpd SM8250_CX>;
> + operating-points-v2 = <&qup_opp_table>;
> status = "disabled";
> };
>
> @@ -534,6 +561,8 @@ uart17: serial@88c000 {
> pinctrl-names = "default";
> pinctrl-0 = <&qup_uart17_default>;
> interrupts = <GIC_SPI 585 IRQ_TYPE_LEVEL_HIGH>;
> + power-domains = <&rpmhpd SM8250_CX>;
> + operating-points-v2 = <&qup_opp_table>;
> status = "disabled";
> };
>
> @@ -560,6 +589,8 @@ spi18: spi@890000 {
> interrupts = <GIC_SPI 586 IRQ_TYPE_LEVEL_HIGH>;
> #address-cells = <1>;
> #size-cells = <0>;
> + power-domains = <&rpmhpd SM8250_CX>;
> + operating-points-v2 = <&qup_opp_table>;
> status = "disabled";
> };
>
> @@ -571,6 +602,8 @@ uart18: serial@890000 {
> pinctrl-names = "default";
> pinctrl-0 = <&qup_uart18_default>;
> interrupts = <GIC_SPI 586 IRQ_TYPE_LEVEL_HIGH>;
> + power-domains = <&rpmhpd SM8250_CX>;
> + operating-points-v2 = <&qup_opp_table>;
> status = "disabled";
> };
>
> @@ -597,6 +630,8 @@ spi19: spi@894000 {
> interrupts = <GIC_SPI 587 IRQ_TYPE_LEVEL_HIGH>;
> #address-cells = <1>;
> #size-cells = <0>;
> + power-domains = <&rpmhpd SM8250_CX>;
> + operating-points-v2 = <&qup_opp_table>;
> status = "disabled";
> };
> };
> @@ -635,6 +670,8 @@ spi0: spi@980000 {
> interrupts = <GIC_SPI 601 IRQ_TYPE_LEVEL_HIGH>;
> #address-cells = <1>;
> #size-cells = <0>;
> + power-domains = <&rpmhpd SM8250_CX>;
> + operating-points-v2 = <&qup_opp_table>;
> status = "disabled";
> };
>
> @@ -661,6 +698,8 @@ spi1: spi@984000 {
> interrupts = <GIC_SPI 602 IRQ_TYPE_LEVEL_HIGH>;
> #address-cells = <1>;
> #size-cells = <0>;
> + power-domains = <&rpmhpd SM8250_CX>;
> + operating-points-v2 = <&qup_opp_table>;
> status = "disabled";
> };
>
> @@ -687,6 +726,8 @@ spi2: spi@988000 {
> interrupts = <GIC_SPI 603 IRQ_TYPE_LEVEL_HIGH>;
> #address-cells = <1>;
> #size-cells = <0>;
> + power-domains = <&rpmhpd SM8250_CX>;
> + operating-points-v2 = <&qup_opp_table>;
> status = "disabled";
> };
>
> @@ -698,6 +739,8 @@ uart2: serial@988000 {
> pinctrl-names = "default";
> pinctrl-0 = <&qup_uart2_default>;
> interrupts = <GIC_SPI 603 IRQ_TYPE_LEVEL_HIGH>;
> + power-domains = <&rpmhpd SM8250_CX>;
> + operating-points-v2 = <&qup_opp_table>;
> status = "disabled";
> };
>
> @@ -724,6 +767,8 @@ spi3: spi@98c000 {
> interrupts = <GIC_SPI 604 IRQ_TYPE_LEVEL_HIGH>;
> #address-cells = <1>;
> #size-cells = <0>;
> + power-domains = <&rpmhpd SM8250_CX>;
> + operating-points-v2 = <&qup_opp_table>;
> status = "disabled";
> };
>
> @@ -750,6 +795,8 @@ spi4: spi@990000 {
> interrupts = <GIC_SPI 605 IRQ_TYPE_LEVEL_HIGH>;
> #address-cells = <1>;
> #size-cells = <0>;
> + power-domains = <&rpmhpd SM8250_CX>;
> + operating-points-v2 = <&qup_opp_table>;
> status = "disabled";
> };
>
> @@ -776,6 +823,8 @@ spi5: spi@994000 {
> interrupts = <GIC_SPI 606 IRQ_TYPE_LEVEL_HIGH>;
> #address-cells = <1>;
> #size-cells = <0>;
> + power-domains = <&rpmhpd SM8250_CX>;
> + operating-points-v2 = <&qup_opp_table>;
> status = "disabled";
> };
>
> @@ -802,6 +851,8 @@ spi6: spi@998000 {
> interrupts = <GIC_SPI 607 IRQ_TYPE_LEVEL_HIGH>;
> #address-cells = <1>;
> #size-cells = <0>;
> + power-domains = <&rpmhpd SM8250_CX>;
> + operating-points-v2 = <&qup_opp_table>;
> status = "disabled";
> };
>
> @@ -813,6 +864,8 @@ uart6: serial@998000 {
> pinctrl-names = "default";
> pinctrl-0 = <&qup_uart6_default>;
> interrupts = <GIC_SPI 607 IRQ_TYPE_LEVEL_HIGH>;
> + power-domains = <&rpmhpd SM8250_CX>;
> + operating-points-v2 = <&qup_opp_table>;
> status = "disabled";
> };
>
> @@ -839,6 +892,8 @@ spi7: spi@99c000 {
> interrupts = <GIC_SPI 608 IRQ_TYPE_LEVEL_HIGH>;
> #address-cells = <1>;
> #size-cells = <0>;
> + power-domains = <&rpmhpd SM8250_CX>;
> + operating-points-v2 = <&qup_opp_table>;
> status = "disabled";
> };
> };
> @@ -877,6 +932,8 @@ spi8: spi@a80000 {
> interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
> #address-cells = <1>;
> #size-cells = <0>;
> + power-domains = <&rpmhpd SM8250_CX>;
> + operating-points-v2 = <&qup_opp_table>;
> status = "disabled";
> };
>
> @@ -903,6 +960,8 @@ spi9: spi@a84000 {
> interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
> #address-cells = <1>;
> #size-cells = <0>;
> + power-domains = <&rpmhpd SM8250_CX>;
> + operating-points-v2 = <&qup_opp_table>;
> status = "disabled";
> };
>
> @@ -929,6 +988,8 @@ spi10: spi@a88000 {
> interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
> #address-cells = <1>;
> #size-cells = <0>;
> + power-domains = <&rpmhpd SM8250_CX>;
> + operating-points-v2 = <&qup_opp_table>;
> status = "disabled";
> };
>
> @@ -955,6 +1016,8 @@ spi11: spi@a8c000 {
> interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
> #address-cells = <1>;
> #size-cells = <0>;
> + power-domains = <&rpmhpd SM8250_CX>;
> + operating-points-v2 = <&qup_opp_table>;
> status = "disabled";
> };
>
> @@ -981,6 +1044,8 @@ spi12: spi@a90000 {
> interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
> #address-cells = <1>;
> #size-cells = <0>;
> + power-domains = <&rpmhpd SM8250_CX>;
> + operating-points-v2 = <&qup_opp_table>;
> status = "disabled";
> };
>
> @@ -992,6 +1057,8 @@ uart12: serial@a90000 {
> pinctrl-names = "default";
> pinctrl-0 = <&qup_uart12_default>;
> interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
> + power-domains = <&rpmhpd SM8250_CX>;
> + operating-points-v2 = <&qup_opp_table>;
> status = "disabled";
> };
>
> @@ -1018,6 +1085,8 @@ spi13: spi@a94000 {
> interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
> #address-cells = <1>;
> #size-cells = <0>;
> + power-domains = <&rpmhpd SM8250_CX>;
> + operating-points-v2 = <&qup_opp_table>;
> status = "disabled";
> };
> };
> --
> 2.28.0
>
prev parent reply other threads:[~2020-09-15 15:09 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-09-15 12:02 [PATCH] arm64: dts: sm8250: Add OPP table for all qup devices Dmitry Baryshkov
2020-09-15 12:18 ` Manivannan Sadhasivam
2020-09-15 15:08 ` Bjorn Andersson [this message]
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