From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH, MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0540AC43464 for ; Fri, 18 Sep 2020 10:50:08 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id AE98E21D24 for ; Fri, 18 Sep 2020 10:50:07 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=0x0f.com header.i=@0x0f.com header.b="cltSYL9K" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726333AbgIRKuC (ORCPT ); Fri, 18 Sep 2020 06:50:02 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50192 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726304AbgIRKuC (ORCPT ); Fri, 18 Sep 2020 06:50:02 -0400 Received: from mail-pj1-x1044.google.com (mail-pj1-x1044.google.com [IPv6:2607:f8b0:4864:20::1044]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E4871C06178A for ; Fri, 18 Sep 2020 03:50:01 -0700 (PDT) Received: by mail-pj1-x1044.google.com with SMTP id b17so2822816pji.1 for ; Fri, 18 Sep 2020 03:50:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=0x0f.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=kzXjI15ZtttHCXeQ3n0cYLMP2xI/9tBvTIvB8MmIIvU=; b=cltSYL9Kp5OpJFjDICGd+/2mu+5pmjD0yP3/WFLAMnhQ1BkMva5IDY0Ib1s5RDyz+j FzydGBg2dPxPJt63s5he+g/ZZIe2iPfkg4nYQoGQ05Mj+oGYJ3j7PrAPP5scKfV1A92J urK7ALIXF9MPDRv8Fxo3YSm9W8O2qN/vXkEGM= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=kzXjI15ZtttHCXeQ3n0cYLMP2xI/9tBvTIvB8MmIIvU=; b=e0UFhKSDqINFWLvKsrs0fU1QhqMfWifoCbOmvd9Mf11UK9YjHR6DkunzJ+xMhBb0Rx Clb/Ok3M4A8iNCekQf2Bo4DUbHqLBjtZSShO71VoSjOX0F+i2VUKFj8JFEj5Hpp3cnsY kTxhndNykk8Ff0tgChbg7g3m4FlA/hDUMySRkQgAwJELrqFcRKs2FMgeumV0bEMGl79Q i7+sExaXVP9w/RQmLmDLeQlFjjOa6cJi/8FnDBrOjI//B/pJE/HqtJaaQdhzIm0wN5ce BE43cQRoHssHAqAl6jZOpVH3vx3ZMoU0ZNS93cgK/mdvxI22E3GY0eouE4Sv0AXR7oWb tIEw== X-Gm-Message-State: AOAM530jPr4cTrObJIa0LAAHhhJChfNZ5pBnL+4c6/CfQpNQxTCjPItJ +OAyeeG+Wxo7x0tp25DF63YVSg== X-Google-Smtp-Source: ABdhPJxc3lT4Yd65/moY9HH8UgfN+MHB/mKWxx8tmHBFJqRh4B7jLhlnT0Bx2j21nIfMFSAZIXyeuA== X-Received: by 2002:a17:90b:88d:: with SMTP id bj13mr12394060pjb.80.1600426201478; Fri, 18 Sep 2020 03:50:01 -0700 (PDT) Received: from shiro.work (p532183-ipngn200506sizuokaden.shizuoka.ocn.ne.jp. [153.199.2.183]) by smtp.googlemail.com with ESMTPSA id 131sm2857634pfy.5.2020.09.18.03.49.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 18 Sep 2020 03:50:00 -0700 (PDT) From: Daniel Palmer To: linux-arm-kernel@lists.infradead.org Cc: devicetree@vger.kernel.org, mark-pk.tsai@mediatek.com, arnd@arndb.de, maz@kernel.org, linux-kernel@vger.kernel.org, Daniel Palmer Subject: [PATCH 2/3] ARM: mstar: Add interrupt controller to base dtsi Date: Fri, 18 Sep 2020 19:49:48 +0900 Message-Id: <20200918104949.3260823-3-daniel@0x0f.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200918104949.3260823-1-daniel@0x0f.com> References: <20200918104949.3260823-1-daniel@0x0f.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add the IRQ and FIQ intc instances to the base MStar/SigmaStar v7 dtsi. All of the known SoCs have both and at the same place with their common IPs using the same interrupt lines. Signed-off-by: Daniel Palmer --- arch/arm/boot/dts/mstar-v7.dtsi | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/arch/arm/boot/dts/mstar-v7.dtsi b/arch/arm/boot/dts/mstar-v7.dtsi index 3b7b9b793736..aec841b52ca4 100644 --- a/arch/arm/boot/dts/mstar-v7.dtsi +++ b/arch/arm/boot/dts/mstar-v7.dtsi @@ -85,6 +85,25 @@ reboot { mask = <0x79>; }; + intc_fiq: interrupt-controller@201310 { + compatible = "mstar,mst-intc"; + reg = <0x201310 0x40>; + #interrupt-cells = <3>; + interrupt-controller; + interrupt-parent = <&gic>; + mstar,irqs-map-range = <96 127>; + }; + + intc_irq: interrupt-controller@201350 { + compatible = "mstar,mst-intc"; + reg = <0x201350 0x40>; + #interrupt-cells = <3>; + interrupt-controller; + interrupt-parent = <&gic>; + mstar,irqs-map-range = <32 95>; + mstar,intc-no-eoi; + }; + l3bridge: l3bridge@204400 { compatible = "mstar,l3bridge"; reg = <0x204400 0x200>; -- 2.27.0