* [PATCH v2 1/3] dt-bindings: phy: amlogic,meson-axg-mipi-pcie-analog: remove reg attribute
[not found] <20200915130339.11079-1-narmstrong@baylibre.com>
@ 2020-09-15 13:03 ` Neil Armstrong
2020-09-23 1:31 ` [PATCH v2 1/3] dt-bindings: phy: amlogic, meson-axg-mipi-pcie-analog: " Rob Herring
2020-09-15 13:03 ` [PATCH v2 2/3] dt-bindings: phy: amlogic,meson-axg-mipi-pcie-analog: remove phy cell parameter Neil Armstrong
1 sibling, 1 reply; 4+ messages in thread
From: Neil Armstrong @ 2020-09-15 13:03 UTC (permalink / raw)
To: kishon, repk, devicetree
Cc: linux-amlogic, linux-arm-kernel, linux-kernel, Neil Armstrong
The PHY registers happens to be at the beginning of a large zone containing
interleaved system registers (mainly clocks, power management, PHY control..),
found in all Amlogic SoC so far.
The goal is to model it the same way as the other "features" of this zone,
like Documentation/devicetree/bindings/clock/amlogic,gxbb-clkc.txt
and Documentation/devicetree/bindings/power/amlogic,meson-ee-pwrc.yaml
and have a coherent bindings scheme over the Amlogic SoCs.
This update the description, removed the reg attribute then updates the example
accordingly.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
---
.../phy/amlogic,meson-axg-mipi-pcie-analog.yaml | 17 +++++++++++------
1 file changed, 11 insertions(+), 6 deletions(-)
diff --git a/Documentation/devicetree/bindings/phy/amlogic,meson-axg-mipi-pcie-analog.yaml b/Documentation/devicetree/bindings/phy/amlogic,meson-axg-mipi-pcie-analog.yaml
index 18c1ec5e19ad..702763a84dac 100644
--- a/Documentation/devicetree/bindings/phy/amlogic,meson-axg-mipi-pcie-analog.yaml
+++ b/Documentation/devicetree/bindings/phy/amlogic,meson-axg-mipi-pcie-analog.yaml
@@ -9,27 +9,32 @@ title: Amlogic AXG shared MIPI/PCIE analog PHY
maintainers:
- Remi Pommarel <repk@triplefau.lt>
+description: |+
+ The Everything-Else Power Domains node should be the child of a syscon
+ node with the required property:
+
+ - compatible: Should be the following:
+ "amlogic,meson-gx-hhi-sysctrl", "simple-mfd", "syscon"
+
+ Refer to the the bindings described in
+ Documentation/devicetree/bindings/mfd/syscon.yaml
+
properties:
compatible:
const: amlogic,axg-mipi-pcie-analog-phy
- reg:
- maxItems: 1
-
"#phy-cells":
const: 1
required:
- compatible
- - reg
- "#phy-cells"
additionalProperties: false
examples:
- |
- mpphy: phy@0 {
+ mpphy: phy {
compatible = "amlogic,axg-mipi-pcie-analog-phy";
- reg = <0x0 0xc>;
#phy-cells = <1>;
};
--
2.22.0
^ permalink raw reply related [flat|nested] 4+ messages in thread* [PATCH v2 2/3] dt-bindings: phy: amlogic,meson-axg-mipi-pcie-analog: remove phy cell parameter
[not found] <20200915130339.11079-1-narmstrong@baylibre.com>
2020-09-15 13:03 ` [PATCH v2 1/3] dt-bindings: phy: amlogic,meson-axg-mipi-pcie-analog: remove reg attribute Neil Armstrong
@ 2020-09-15 13:03 ` Neil Armstrong
2020-09-22 19:35 ` [PATCH v2 2/3] dt-bindings: phy: amlogic, meson-axg-mipi-pcie-analog: " Rob Herring
1 sibling, 1 reply; 4+ messages in thread
From: Neil Armstrong @ 2020-09-15 13:03 UTC (permalink / raw)
To: kishon, repk, devicetree
Cc: linux-amlogic, linux-arm-kernel, linux-kernel, Neil Armstrong
The Amlogic AXG MIPI + PCIe Analog PHY provides function for both PCIe and
MIPI DSI at the same time, and is not exclusive.
Thus remove the invalid phy cell parameter.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
---
.../bindings/phy/amlogic,meson-axg-mipi-pcie-analog.yaml | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/phy/amlogic,meson-axg-mipi-pcie-analog.yaml b/Documentation/devicetree/bindings/phy/amlogic,meson-axg-mipi-pcie-analog.yaml
index 702763a84dac..4d01f3124e1c 100644
--- a/Documentation/devicetree/bindings/phy/amlogic,meson-axg-mipi-pcie-analog.yaml
+++ b/Documentation/devicetree/bindings/phy/amlogic,meson-axg-mipi-pcie-analog.yaml
@@ -24,7 +24,7 @@ properties:
const: amlogic,axg-mipi-pcie-analog-phy
"#phy-cells":
- const: 1
+ const: 0
required:
- compatible
@@ -36,5 +36,5 @@ examples:
- |
mpphy: phy {
compatible = "amlogic,axg-mipi-pcie-analog-phy";
- #phy-cells = <1>;
+ #phy-cells = <0>;
};
--
2.22.0
^ permalink raw reply related [flat|nested] 4+ messages in thread