From: Sascha Hauer <s.hauer@pengutronix.de>
To: Li Jun <jun.li@nxp.com>
Cc: robh+dt@kernel.org, shawnguo@kernel.org, balbi@kernel.org,
mathias.nyman@intel.com, gregkh@linuxfoundation.org,
kernel@pengutronix.de, festevam@gmail.com, linux-imx@nxp.com,
Anson.Huang@nxp.com, aisheng.dong@nxp.com, peng.fan@nxp.com,
fugang.duan@nxp.com, qiangqing.zhang@nxp.com,
horia.geanta@nxp.com, linux-usb@vger.kernel.org,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v3 5/6] arm64: dtsi: imx8mp: add usb nodes
Date: Wed, 23 Sep 2020 09:50:40 +0200 [thread overview]
Message-ID: <20200923075040.GD25328@pengutronix.de> (raw)
In-Reply-To: <1600771612-30727-6-git-send-email-jun.li@nxp.com>
On Tue, Sep 22, 2020 at 06:46:51PM +0800, Li Jun wrote:
> imx8mp integrates 2 identical dwc3 based USB3 controllers and
> Synopsys phys, each instance has additional wakeup logic to
> support low power mode, so the glue layer need a node with dwc3
> core sub node.
>
> Signed-off-by: Li Jun <jun.li@nxp.com>
> ---
> arch/arm64/boot/dts/freescale/imx8mp.dtsi | 88 +++++++++++++++++++++++++++++++
> 1 file changed, 88 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> index 9de2aa1..1b7ed4c 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> + usb3_1: usb@32f10108 {
> + compatible = "fsl,imx8mp-dwc3";
> + reg = <0x32f10108 0x8>;
> + clocks = <&clk IMX8MP_CLK_HSIO_ROOT>,
> + <&clk IMX8MP_CLK_USB_ROOT>;
> + clock-names = "hsio", "suspend";
> + assigned-clocks = <&clk IMX8MP_CLK_HSIO_AXI_SRC>;
In Linux-5.9-rc6 this clock doesn't exist anymore. Should be
IMX8MP_CLK_HSIO_AXI
> + assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_500M>;
> + assigned-clock-rates = <500000000>;
> + interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges;
> + status = "disabled";
> +
> + usb_dwc3_1: dwc3@38200000 {
> + compatible = "snps,dwc3";
> + reg = <0x38200000 0x10000>;
> + clocks = <&clk IMX8MP_CLK_HSIO_AXI>,
> + <&clk IMX8MP_CLK_USB_CORE_REF>,
> + <&clk IMX8MP_CLK_USB_ROOT>;
> + clock-names = "bus_early", "ref", "suspend";
> + assigned-clocks = <&clk IMX8MP_CLK_HSIO_AXI>;
> + assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_500M>;
> + assigned-clock-rates = <500000000>;
> + interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
> + phys = <&usb3_phy1>, <&usb3_phy1>;
> + phy-names = "usb2-phy", "usb3-phy";
> + snps,dis-u2-freeclk-exists-quirk;
> + xhci-64bit-support-disable;
> + status = "disabled";
Does it make sense for a board to enable the parent node and leave this
one disabled? If not you can drop this status = "disabled" here.
Sascha
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next prev parent reply other threads:[~2020-09-23 7:51 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-09-22 10:46 [PATCH v3 0/6] add NXP imx8mp usb support Li Jun
2020-09-22 10:46 ` [PATCH v3 1/6] dt-bindings: usb: xhci: add property to disable xhci 64bit support Li Jun
2020-09-29 18:11 ` Rob Herring
2020-10-02 16:39 ` Jun Li
2020-09-22 10:46 ` [PATCH v3 2/6] usb: host: xhci-plat: add support of XHCI_NO_64BIT_SUPPORT via property Li Jun
2020-09-22 10:46 ` [PATCH v3 3/6] dt-bindings: usb: dwc3-imx8mp: add imx8mp dwc3 glue bindings Li Jun
2020-09-22 14:32 ` Krzysztof Kozlowski
2020-09-22 16:45 ` Jun Li
2020-09-22 18:22 ` Krzysztof Kozlowski
2020-09-22 10:46 ` [PATCH v3 4/6] usb: dwc3: add imx8mp dwc3 glue layer driver Li Jun
2020-09-22 10:46 ` [PATCH v3 5/6] arm64: dtsi: imx8mp: add usb nodes Li Jun
2020-09-22 14:39 ` Krzysztof Kozlowski
2020-09-23 7:50 ` Sascha Hauer [this message]
2020-09-23 8:49 ` Jun Li
2020-09-22 10:46 ` [PATCH v3 6/6] arm64: dts: imx8mp-evk: enable usb1 as host mode Li Jun
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