* [PATCH v2 1/2] arm64: dts: freescale: Add pmu support on imx8mp
@ 2020-09-29 9:15 Jacky Bai
2020-09-29 9:15 ` [PATCH v2 2/2] arm64: dts: freescale: Add pmu support on imx8mn Jacky Bai
` (2 more replies)
0 siblings, 3 replies; 5+ messages in thread
From: Jacky Bai @ 2020-09-29 9:15 UTC (permalink / raw)
To: shawnguo, robh+dt, s.hauer, krzk; +Cc: festevam, linux-imx, devicetree
Add PMU node to enable pmu support on imx8mp.
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
---
Change in V2:
- Update the compatible string to ca53 specific
- Correct the GIC_CPU_MASK num to 4 as only have 4xA53 cores
---
arch/arm64/boot/dts/freescale/imx8mp.dtsi | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
index 6038f66aefc1..2a7bbd4d68ac 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
@@ -133,6 +133,13 @@ clk_ext4: clock-ext4 {
clock-output-names = "clk_ext4";
};
+ pmu {
+ compatible = "arm,cortex-a53-pmu";
+ interrupts = <GIC_PPI 7
+ (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
+ interrupt-affinity = <&A53_0>, <&A53_1>, <&A53_2>, <&A53_3>;
+ };
+
psci {
compatible = "arm,psci-1.0";
method = "smc";
--
2.26.2
^ permalink raw reply related [flat|nested] 5+ messages in thread* [PATCH v2 2/2] arm64: dts: freescale: Add pmu support on imx8mn
2020-09-29 9:15 [PATCH v2 1/2] arm64: dts: freescale: Add pmu support on imx8mp Jacky Bai
@ 2020-09-29 9:15 ` Jacky Bai
2020-09-29 9:26 ` Krzysztof Kozlowski
2020-09-29 9:26 ` [PATCH v2 1/2] arm64: dts: freescale: Add pmu support on imx8mp Krzysztof Kozlowski
2020-10-30 0:55 ` Shawn Guo
2 siblings, 1 reply; 5+ messages in thread
From: Jacky Bai @ 2020-09-29 9:15 UTC (permalink / raw)
To: shawnguo, robh+dt, s.hauer, krzk; +Cc: festevam, linux-imx, devicetree
Add PMU node to enable pmu support on imx8mn.
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
---
Change in V2:
- Update the compatible string to ca53 specific
- Correct the GIC_CPU_MASK num to 4 as only have 4xA53 cores
---
arch/arm64/boot/dts/freescale/imx8mn.dtsi | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
index 746faf1cf2fb..184fd3285383 100644
--- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
@@ -186,6 +186,13 @@ clk_ext4: clock-ext4 {
clock-output-names = "clk_ext4";
};
+ pmu {
+ compatible = "arm,cortex-a53-pmu";
+ interrupts = <GIC_PPI 7
+ (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
+ interrupt-affinity = <&A53_0>, <&A53_1>, <&A53_2>, <&A53_3>;
+ };
+
psci {
compatible = "arm,psci-1.0";
method = "smc";
--
2.26.2
^ permalink raw reply related [flat|nested] 5+ messages in thread* Re: [PATCH v2 2/2] arm64: dts: freescale: Add pmu support on imx8mn
2020-09-29 9:15 ` [PATCH v2 2/2] arm64: dts: freescale: Add pmu support on imx8mn Jacky Bai
@ 2020-09-29 9:26 ` Krzysztof Kozlowski
0 siblings, 0 replies; 5+ messages in thread
From: Krzysztof Kozlowski @ 2020-09-29 9:26 UTC (permalink / raw)
To: Jacky Bai; +Cc: shawnguo, robh+dt, s.hauer, festevam, linux-imx, devicetree
On Tue, Sep 29, 2020 at 05:15:23PM +0800, Jacky Bai wrote:
> Add PMU node to enable pmu support on imx8mn.
>
> Signed-off-by: Jacky Bai <ping.bai@nxp.com>
> ---
> Change in V2:
> - Update the compatible string to ca53 specific
> - Correct the GIC_CPU_MASK num to 4 as only have 4xA53 cores
> ---
> arch/arm64/boot/dts/freescale/imx8mn.dtsi | 7 +++++++
> 1 file changed, 7 insertions(+)
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH v2 1/2] arm64: dts: freescale: Add pmu support on imx8mp
2020-09-29 9:15 [PATCH v2 1/2] arm64: dts: freescale: Add pmu support on imx8mp Jacky Bai
2020-09-29 9:15 ` [PATCH v2 2/2] arm64: dts: freescale: Add pmu support on imx8mn Jacky Bai
@ 2020-09-29 9:26 ` Krzysztof Kozlowski
2020-10-30 0:55 ` Shawn Guo
2 siblings, 0 replies; 5+ messages in thread
From: Krzysztof Kozlowski @ 2020-09-29 9:26 UTC (permalink / raw)
To: Jacky Bai; +Cc: shawnguo, robh+dt, s.hauer, festevam, linux-imx, devicetree
On Tue, Sep 29, 2020 at 05:15:22PM +0800, Jacky Bai wrote:
> Add PMU node to enable pmu support on imx8mp.
>
> Signed-off-by: Jacky Bai <ping.bai@nxp.com>
> ---
> Change in V2:
> - Update the compatible string to ca53 specific
> - Correct the GIC_CPU_MASK num to 4 as only have 4xA53 cores
> ---
> arch/arm64/boot/dts/freescale/imx8mp.dtsi | 7 +++++++
> 1 file changed, 7 insertions(+)
>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH v2 1/2] arm64: dts: freescale: Add pmu support on imx8mp
2020-09-29 9:15 [PATCH v2 1/2] arm64: dts: freescale: Add pmu support on imx8mp Jacky Bai
2020-09-29 9:15 ` [PATCH v2 2/2] arm64: dts: freescale: Add pmu support on imx8mn Jacky Bai
2020-09-29 9:26 ` [PATCH v2 1/2] arm64: dts: freescale: Add pmu support on imx8mp Krzysztof Kozlowski
@ 2020-10-30 0:55 ` Shawn Guo
2 siblings, 0 replies; 5+ messages in thread
From: Shawn Guo @ 2020-10-30 0:55 UTC (permalink / raw)
To: Jacky Bai; +Cc: robh+dt, s.hauer, krzk, festevam, linux-imx, devicetree
On Tue, Sep 29, 2020 at 05:15:22PM +0800, Jacky Bai wrote:
> Add PMU node to enable pmu support on imx8mp.
>
> Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Applied both, thanks.
^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2020-10-30 0:55 UTC | newest]
Thread overview: 5+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2020-09-29 9:15 [PATCH v2 1/2] arm64: dts: freescale: Add pmu support on imx8mp Jacky Bai
2020-09-29 9:15 ` [PATCH v2 2/2] arm64: dts: freescale: Add pmu support on imx8mn Jacky Bai
2020-09-29 9:26 ` Krzysztof Kozlowski
2020-09-29 9:26 ` [PATCH v2 1/2] arm64: dts: freescale: Add pmu support on imx8mp Krzysztof Kozlowski
2020-10-30 0:55 ` Shawn Guo
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).