From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6620EC47420 for ; Tue, 29 Sep 2020 18:45:06 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 21AE7208FE for ; Tue, 29 Sep 2020 18:45:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728331AbgI2SpF (ORCPT ); Tue, 29 Sep 2020 14:45:05 -0400 Received: from mga09.intel.com ([134.134.136.24]:32848 "EHLO mga09.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728166AbgI2SpF (ORCPT ); Tue, 29 Sep 2020 14:45:05 -0400 IronPort-SDR: zgEFPiwAME70oOLz4UPZwvpX96rohxH7/Gj9yjb5hCC7uj//SbpqMg9NZeQ6MK6jGapk3k98EQ xJdS2MSg8/+g== X-IronPort-AV: E=McAfee;i="6000,8403,9759"; a="163140974" X-IronPort-AV: E=Sophos;i="5.77,319,1596524400"; d="scan'208";a="163140974" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Sep 2020 11:45:04 -0700 IronPort-SDR: JCT8qF+gweC5XXSdlIRcipyaa5THw9QAIoWCu892HKjlUwABAdeExJYDWZeePvcgUgrBVCTsBb t4b1V8mE1ceQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.77,319,1596524400"; d="scan'208";a="345366663" Received: from ubuntu18.png.intel.com ([10.88.229.38]) by fmsmga002.fm.intel.com with ESMTP; 29 Sep 2020 11:45:02 -0700 From: vijayakannan.ayyathurai@intel.com To: thierry.reding@gmail.com, u.kleine-koenig@pengutronix.de, robh+dt@kernel.org Cc: linux-pwm@vger.kernel.org, devicetree@vger.kernel.org, wan.ahmad.zainie.wan.mohamad@intel.com, andriy.shevchenko@linux.intel.com, mgross@linux.intel.com, lakshmi.bai.raja.subramanian@intel.com, vijayakannan.ayyathurai@intel.com Subject: [PATCH v8 2/2] dt-bindings: pwm: keembay: Add bindings for Intel Keem Bay PWM Date: Wed, 30 Sep 2020 02:42:36 +0800 Message-Id: <20200929184236.12601-3-vijayakannan.ayyathurai@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200929184236.12601-1-vijayakannan.ayyathurai@intel.com> References: <20200929184236.12601-1-vijayakannan.ayyathurai@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Vijayakannan Ayyathurai Add PWM Device Tree bindings documentation for the Intel Keem Bay SoC. Signed-off-by: Vineetha G. Jaya Kumaran Reviewed-by: Rob Herring Acked-by: Uwe Kleine-König Signed-off-by: Vijayakannan Ayyathurai --- .../bindings/pwm/intel,keembay-pwm.yaml | 47 +++++++++++++++++++ 1 file changed, 47 insertions(+) create mode 100644 Documentation/devicetree/bindings/pwm/intel,keembay-pwm.yaml diff --git a/Documentation/devicetree/bindings/pwm/intel,keembay-pwm.yaml b/Documentation/devicetree/bindings/pwm/intel,keembay-pwm.yaml new file mode 100644 index 000000000000..a37433487632 --- /dev/null +++ b/Documentation/devicetree/bindings/pwm/intel,keembay-pwm.yaml @@ -0,0 +1,47 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +# Copyright (C) 2020 Intel Corporation +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pwm/intel,keembay-pwm.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Intel Keem Bay PWM Device Tree Bindings + +maintainers: + - Vineetha G. Jaya Kumaran + +allOf: + - $ref: pwm.yaml# + +properties: + compatible: + enum: + - intel,keembay-pwm + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + "#pwm-cells": + const: 2 + +required: + - compatible + - reg + - clocks + - '#pwm-cells' + +additionalProperties: false + +examples: + - | + #define KEEM_BAY_A53_GPIO + + pwm@203200a0 { + compatible = "intel,keembay-pwm"; + reg = <0x203200a0 0xe8>; + clocks = <&scmi_clk KEEM_BAY_A53_GPIO>; + #pwm-cells = <2>; + }; -- 2.17.1