From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0ADFBC4727C for ; Tue, 29 Sep 2020 19:12:16 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id A9A1C20774 for ; Tue, 29 Sep 2020 19:12:15 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728563AbgI2TMP (ORCPT ); Tue, 29 Sep 2020 15:12:15 -0400 Received: from vps0.lunn.ch ([185.16.172.187]:34242 "EHLO vps0.lunn.ch" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728166AbgI2TMP (ORCPT ); Tue, 29 Sep 2020 15:12:15 -0400 Received: from andrew by vps0.lunn.ch with local (Exim 4.94) (envelope-from ) id 1kNL2X-00GnK7-0X; Tue, 29 Sep 2020 21:11:53 +0200 Date: Tue, 29 Sep 2020 21:11:53 +0200 From: Andrew Lunn To: Vladimir Oltean Cc: robh+dt@kernel.org, shawnguo@kernel.org, mpe@ellerman.id.au, devicetree@vger.kernel.org, benh@kernel.crashing.org, paulus@samba.org, linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org, netdev@vger.kernel.org, madalin.bucur@oss.nxp.com, radu-andrei.bulie@nxp.com, fido_max@inbox.ru, Vladimir Oltean Subject: Re: [PATCH v2 devicetree 2/2] powerpc: dts: t1040rdb: add ports for Seville Ethernet switch Message-ID: <20200929191153.GF3996795@lunn.ch> References: <20200929113209.3767787-1-vladimir.oltean@nxp.com> <20200929113209.3767787-3-vladimir.oltean@nxp.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20200929113209.3767787-3-vladimir.oltean@nxp.com> Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org > +&seville_port0 { > + managed = "in-band-status"; > + phy-handle = <&phy_qsgmii_0>; > + phy-mode = "qsgmii"; > + /* ETH4 written on chassis */ > + label = "swp4"; If ETH4 is on the chassis why not use ETH4? Andrew