From: Faiz Abbas <faiz_abbas@ti.com>
To: <linux-kernel@vger.kernel.org>, <devicetree@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>
Cc: <will@kernel.org>, <robh+dt@kernel.org>, <nm@ti.com>,
<t-kristo@ti.com>, <faiz_abbas@ti.com>
Subject: [PATCH 1/8] arm64: dts: ti: k3-j7200-main: Add gpio nodes in main domain
Date: Fri, 2 Oct 2020 00:35:34 +0530 [thread overview]
Message-ID: <20201001190541.6364-2-faiz_abbas@ti.com> (raw)
In-Reply-To: <20201001190541.6364-1-faiz_abbas@ti.com>
There are 4 instances of gpio modules in main domain:
gpio0, gpio2, gpio4 and gpio6
Groups are created to provide protection between different processor virtual
worlds. Each of these modules I/O pins are muxed within the group. Exactly
one module can be selected to control the corresponding pin by selecting it
in the pad mux configuration registers.
This group pins out 69 lines (5 banks).
Add DT modes for each module instance in the main domain.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
---
arch/arm64/boot/dts/ti/k3-j7200-main.dtsi | 68 +++++++++++++++++++++++
1 file changed, 68 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
index 4a4fcd24f852..f21f22237e0f 100644
--- a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
@@ -395,4 +395,72 @@
no-1-8-v;
dma-coherent;
};
+
+ main_gpio0: gpio@600000 {
+ compatible = "ti,j721e-gpio", "ti,keystone-gpio";
+ reg = <0x00 0x00600000 0x00 0x100>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-parent = <&main_gpio_intr>;
+ interrupts = <145>, <146>, <147>, <148>,
+ <149>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ ti,ngpio = <69>;
+ ti,davinci-gpio-unbanked = <0>;
+ power-domains = <&k3_pds 105 TI_SCI_PD_EXCLUSIVE>;
+ clocks = <&k3_clks 105 0>;
+ clock-names = "gpio";
+ };
+
+ main_gpio2: gpio@610000 {
+ compatible = "ti,j721e-gpio", "ti,keystone-gpio";
+ reg = <0x00 0x00610000 0x00 0x100>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-parent = <&main_gpio_intr>;
+ interrupts = <154>, <155>, <156>, <157>,
+ <158>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ ti,ngpio = <69>;
+ ti,davinci-gpio-unbanked = <0>;
+ power-domains = <&k3_pds 107 TI_SCI_PD_EXCLUSIVE>;
+ clocks = <&k3_clks 107 0>;
+ clock-names = "gpio";
+ };
+
+ main_gpio4: gpio@620000 {
+ compatible = "ti,j721e-gpio", "ti,keystone-gpio";
+ reg = <0x00 0x00620000 0x00 0x100>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-parent = <&main_gpio_intr>;
+ interrupts = <163>, <164>, <165>, <166>,
+ <167>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ ti,ngpio = <69>;
+ ti,davinci-gpio-unbanked = <0>;
+ power-domains = <&k3_pds 109 TI_SCI_PD_EXCLUSIVE>;
+ clocks = <&k3_clks 109 0>;
+ clock-names = "gpio";
+ };
+
+ main_gpio6: gpio@630000 {
+ compatible = "ti,j721e-gpio", "ti,keystone-gpio";
+ reg = <0x00 0x00630000 0x00 0x100>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-parent = <&main_gpio_intr>;
+ interrupts = <172>, <173>, <174>, <175>,
+ <176>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ ti,ngpio = <69>;
+ ti,davinci-gpio-unbanked = <0>;
+ power-domains = <&k3_pds 111 TI_SCI_PD_EXCLUSIVE>;
+ clocks = <&k3_clks 111 0>;
+ clock-names = "gpio";
+ };
};
--
2.17.1
next prev parent reply other threads:[~2020-10-01 19:06 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-01 19:05 [PATCH 0/8] Add support for UHS modes in TI's J721e and J7200 boards Faiz Abbas
2020-10-01 19:05 ` Faiz Abbas [this message]
2020-10-01 19:05 ` [PATCH 2/8] arm64: dts: ti: k3-j7200: Add gpio nodes in wakeup domain Faiz Abbas
2020-10-01 19:05 ` [PATCH 3/8] arm64: dts: ti: k3-j7200-common-proc-board: Disable unused gpio modules Faiz Abbas
2020-10-01 19:05 ` [PATCH 4/8] arm64: dts: ti: k3-j721e-main: Add output tap delay values Faiz Abbas
2020-10-01 19:05 ` [PATCH 5/8] arm64: dts: ti: k3-j721e-common-proc-board: Add support SD card UHS modes Faiz Abbas
2020-10-01 19:05 ` [PATCH 6/8] arm64: dts: ti: k3-j7200-common-proc-board: " Faiz Abbas
2020-10-01 19:13 ` [PATCH 0/8] Add support for UHS modes in TI's J721e and J7200 boards Nishanth Menon
2020-10-02 4:44 ` Faiz Abbas
2020-10-02 12:49 ` Nishanth Menon
2020-10-02 16:09 ` Faiz Abbas
2020-10-26 14:55 ` Nishanth Menon
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