From: Lars Povlsen <lars.povlsen@microchip.com>
To: Sebastian Reichel <sre@kernel.org>
Cc: Lars Povlsen <lars.povlsen@microchip.com>,
Alexandre Belloni <alexandre.belloni@bootlin.com>,
Microchip Linux Driver Support <UNGLinuxDriver@microchip.com>,
<linux-pm@vger.kernel.org>, <devicetree@vger.kernel.org>,
<linux-kernel@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>
Subject: [PATCH v2 3/3] arm64: dts: sparx5: Add reset support
Date: Tue, 6 Oct 2020 22:03:16 +0200 [thread overview]
Message-ID: <20201006200316.2261245-4-lars.povlsen@microchip.com> (raw)
In-Reply-To: <20201006200316.2261245-1-lars.povlsen@microchip.com>
This adds reset support to the Sparx5 SoC DT.
Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com>
---
arch/arm64/boot/dts/microchip/sparx5.dtsi | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/arch/arm64/boot/dts/microchip/sparx5.dtsi b/arch/arm64/boot/dts/microchip/sparx5.dtsi
index a84ffd3069d4..016be6d27a6b 100644
--- a/arch/arm64/boot/dts/microchip/sparx5.dtsi
+++ b/arch/arm64/boot/dts/microchip/sparx5.dtsi
@@ -118,6 +118,16 @@ gic: interrupt-controller@600300000 {
interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
};
+ cpu_ctrl: syscon@600000000 {
+ compatible = "microchip,sparx5-cpu-syscon", "syscon";
+ reg = <0x6 0x00000000 0xd0>;
+ };
+
+ reset@611010008 {
+ compatible = "microchip,sparx5-chip-reset";
+ reg = <0x6 0x11010008 0x4>;
+ };
+
uart0: serial@600100000 {
pinctrl-0 = <&uart_pins>;
pinctrl-names = "default";
--
2.25.1
next prev parent reply other threads:[~2020-10-06 20:04 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-06 20:03 [PATCH v2 0/3] power: Add reset support for Microchip Sparx5 SoC Lars Povlsen
2020-10-06 20:03 ` [PATCH v2 1/3] dt-bindings: reset: ocelot: Add Sparx5 support Lars Povlsen
2020-10-07 15:54 ` Rob Herring
2020-10-06 20:03 ` [PATCH v2 2/3] power: reset: ocelot: Add support for Sparx5 Lars Povlsen
2020-10-06 20:03 ` Lars Povlsen [this message]
2020-10-08 22:05 ` [PATCH v2 0/3] power: Add reset support for Microchip Sparx5 SoC Sebastian Reichel
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