From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0A3BAC433DF for ; Mon, 12 Oct 2020 06:13:25 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id C551C20773 for ; Mon, 12 Oct 2020 06:13:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727386AbgJLGNE (ORCPT ); Mon, 12 Oct 2020 02:13:04 -0400 Received: from szxga07-in.huawei.com ([45.249.212.35]:45554 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1727337AbgJLGM5 (ORCPT ); Mon, 12 Oct 2020 02:12:57 -0400 Received: from DGGEMS414-HUB.china.huawei.com (unknown [172.30.72.59]) by Forcepoint Email with ESMTP id C3802C80DC9FBB15F377; Mon, 12 Oct 2020 14:12:50 +0800 (CST) Received: from thunder-town.china.huawei.com (10.174.177.134) by DGGEMS414-HUB.china.huawei.com (10.3.19.214) with Microsoft SMTP Server id 14.3.487.0; Mon, 12 Oct 2020 14:12:40 +0800 From: Zhen Lei To: Wei Xu , Rob Herring , devicetree , linux-arm-kernel , linux-kernel CC: Zhen Lei Subject: [PATCH v2 10/10] dt-bindings: arm: hisilicon: add missing properties into cpuctrl.yaml Date: Mon, 12 Oct 2020 14:12:25 +0800 Message-ID: <20201012061225.1597-11-thunder.leizhen@huawei.com> X-Mailer: git-send-email 2.26.0.windows.1 In-Reply-To: <20201012061225.1597-1-thunder.leizhen@huawei.com> References: <20201012061225.1597-1-thunder.leizhen@huawei.com> MIME-Version: 1.0 Content-Transfer-Encoding: 7BIT Content-Type: text/plain; charset=US-ASCII X-Originating-IP: [10.174.177.134] X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add properties: #address-cells, #size-cells and ranges. Due to the Hisilicon CPU controller node may contains child nodes, change the value of "additionalProperties" from "false" to "type: object". The corresponding examples are also added. Signed-off-by: Zhen Lei --- .../bindings/arm/hisilicon/controller/cpuctrl.yaml | 27 +++++++++++++++++++++- 1 file changed, 26 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/arm/hisilicon/controller/cpuctrl.yaml b/Documentation/devicetree/bindings/arm/hisilicon/controller/cpuctrl.yaml index f6a314db3a59416..528dad4cde3cd19 100644 --- a/Documentation/devicetree/bindings/arm/hisilicon/controller/cpuctrl.yaml +++ b/Documentation/devicetree/bindings/arm/hisilicon/controller/cpuctrl.yaml @@ -21,9 +21,34 @@ properties: reg: maxItems: 1 + "#address-cells": + const: 1 + + "#size-cells": + const: 1 + + ranges: true + required: - compatible - reg -additionalProperties: false +additionalProperties: + type: object + +examples: + - | + cpuctrl@a22000 { + compatible = "hisilicon,cpuctrl"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x00a22000 0x2000>; + ranges = <0 0x00a22000 0x2000>; + + clock: clock@0 { + compatible = "hisilicon,hix5hd2-clock"; + reg = <0 0x2000>; + #clock-cells = <1>; + }; + }; ... -- 1.8.3