From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1424CC433E7 for ; Mon, 19 Oct 2020 14:10:19 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 95C57222C3 for ; Mon, 19 Oct 2020 14:10:18 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=0x0f.com header.i=@0x0f.com header.b="qcGN5/o5" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728716AbgJSOKR (ORCPT ); Mon, 19 Oct 2020 10:10:17 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38408 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729155AbgJSOKR (ORCPT ); Mon, 19 Oct 2020 10:10:17 -0400 Received: from mail-pl1-x644.google.com (mail-pl1-x644.google.com [IPv6:2607:f8b0:4864:20::644]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 120A1C0613CE for ; Mon, 19 Oct 2020 07:10:17 -0700 (PDT) Received: by mail-pl1-x644.google.com with SMTP id d23so5036274pll.7 for ; Mon, 19 Oct 2020 07:10:17 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=0x0f.com; s=google; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=6+WsrhoyC+JrQFZTcl3DCWJnD0CqoqCFHUTm6b9tCCw=; b=qcGN5/o5r/XV13JNsNqld4FWnPXR67wk9dguz8TXU8HqXbrA40SPGrCvBi4NJoGSV1 4hWuPp50jFDwmGLpjfmcvHBXANVL2HPnPWiTfyL2DGaqU2zYNWHuWQ0NNld34/P5kW6M 0aBfFmwKlmX9U4HrmBCznpf9+H8NfBNvsYh/4= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=6+WsrhoyC+JrQFZTcl3DCWJnD0CqoqCFHUTm6b9tCCw=; b=Pp70SQKFhmj5wF4fBHo5RxCjbjRKv8oLyhBk+f/LKInrdCGTOQOf+0JIHxWCCiyPHu sjHeZtNKblKgG6Su3x4bShmWdw4pU1IzMfJ7e7iurZBvGZ/nxY1+gednQGdthwXhmpcw RAYl0uT9p0MHr92rBYjdIzgnXtbrmgJ2GSegJOMSiuEy5J0oV9as/rMnAQ95NFVB8abh ZjJpBdasHIZAZycgqU1oH3aGk3EpVmK2y3y+kpUIMs4YU35qSGVehCSipxWvDaXOhEEz vZNwuveaAJ9dNoxTOWYRoucYu6qjB/ps2HRCOF7QYlN4MgbmATZkIltVPbvBCZdfNkNH qAGQ== X-Gm-Message-State: AOAM532nMmKIAhgjZL925IJND3hf4KgrqdR6ydUgTNyMX4NnTBZSvl7R YafavQ3exDbgEvdCSnxfGgZrWg== X-Google-Smtp-Source: ABdhPJxhT0SgjSefK46NYqt2jQXMLGLYqIJCdoFCundLghVKFKCMm+XeLTi0PyXihiutMjbKZgaQGA== X-Received: by 2002:a17:90a:7d12:: with SMTP id g18mr17918776pjl.89.1603116616076; Mon, 19 Oct 2020 07:10:16 -0700 (PDT) Received: from shiro.work (p1268123-ipngn200803sizuokaden.shizuoka.ocn.ne.jp. [118.13.124.123]) by smtp.googlemail.com with ESMTPSA id 131sm78999pfy.5.2020.10.19.07.10.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 19 Oct 2020 07:10:15 -0700 (PDT) From: Daniel Palmer To: linux-gpio@vger.kernel.org Cc: devicetree@vger.kernel.org, arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linus.walleij@linaro.org, Daniel Palmer Subject: [PATCH v2 0/5] Add GPIO support for MStar/SigmaStar ARMv7 Date: Mon, 19 Oct 2020 23:10:03 +0900 Message-Id: <20201019141008.871177-1-daniel@0x0f.com> X-Mailer: git-send-email 2.28.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org At the moment the MStar/SigmaStar support is only really capable of shell from an initramfs and not much else. Most of the interesting drivers are blocked on clock and pinctrl drivers and those are going to take me a little while to get cleaned up. Clock and pinctrl aren't needed for basic GPIO to work (all pins start off as GPIOs..) and it makes it possible to actually do something so this series adds everything that is needed for the main GPIO block in these chips. Changes since v1: - Moves the binding header commit before the yaml commit - Fixes the license on the binding header to include BSD-2-Clause - The driver has been reworked to use the gpiolib irqchip functionality as suggested by Linus[0]. I think I got this right. The gpio controller doesn't actually do anything with interrupts itself.. It just happens to have 4 lines that are also wired to lines on one of the interrupt controllers. - Now that the driver is an interrupt controller in it's own right for the gpio lines that have associated interrupts the binding description has been updated to add the interrupt-controller bits and remove the description of the interrupt-names that described how the interrupts used to be passed in. Daniel Palmer (5): dt-bindings: gpio: Add a binding header for the MSC313 GPIO driver dt-bindings: gpio: Binding for MStar MSC313 GPIO controller gpio: msc313: MStar MSC313 GPIO driver ARM: mstar: Add gpio controller to MStar base dtsi ARM: mstar: Fill in GPIO controller properties for infinity .../bindings/gpio/mstar,msc313-gpio.yaml | 61 +++ MAINTAINERS | 3 + arch/arm/boot/dts/mstar-infinity.dtsi | 7 + arch/arm/boot/dts/mstar-v7.dtsi | 10 + drivers/gpio/Kconfig | 9 + drivers/gpio/Makefile | 1 + drivers/gpio/gpio-msc313.c | 406 ++++++++++++++++++ include/dt-bindings/gpio/msc313-gpio.h | 95 ++++ 8 files changed, 592 insertions(+) create mode 100644 Documentation/devicetree/bindings/gpio/mstar,msc313-gpio.yaml create mode 100644 drivers/gpio/gpio-msc313.c create mode 100644 include/dt-bindings/gpio/msc313-gpio.h -- 2.28.0