From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-10.1 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B224BC388F9 for ; Fri, 23 Oct 2020 09:52:36 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 5F143207EA for ; Fri, 23 Oct 2020 09:52:36 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1603446756; bh=OlTyjHcCZUKqKVz0E/hCJ0iAX7S9PLI3XpmHC9Lf8S8=; h=Date:From:To:Cc:Subject:References:In-Reply-To:List-ID:From; b=a3ig/HyNHUyJ/F/AV7orbNN8Kz9BZVuOnGXtBF4g/0ogfNGYXJZNzEwuTWd+3B8oa WyJ8iLvct+1GvIJNgscaOUj0xkoLdS12Oavd4LQ7JuLTt7ME2J7fgPeEGiooJN0McX s2esy648E1IWBin/tkJKnAz7cO7wa8LpPXcVlTwc= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S461741AbgJWJwf (ORCPT ); Fri, 23 Oct 2020 05:52:35 -0400 Received: from mail-ed1-f67.google.com ([209.85.208.67]:37432 "EHLO mail-ed1-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S461695AbgJWJwf (ORCPT ); Fri, 23 Oct 2020 05:52:35 -0400 Received: by mail-ed1-f67.google.com with SMTP id o18so948700edq.4; Fri, 23 Oct 2020 02:52:32 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to; bh=f/8HDITGONi7lAEbL49t2FC11Ajj2yI5i/0Rt6na+KA=; b=EZYcJIGTWkF4yZDVh19fALOIY0vxj7imgzuU2MlDye/2l8O7fUPfUeBQQ1luvyDPNq 2+tHFsWHDSxyz4rN+Wp9uT6yxSwqqEp9VaxVbKMmwijI/Nf+k7F3hsm5v7pkk1onx4PU UNHKzdpjqRf3fsPadnteDNqZF5Tfb21+ygkYWkf/6fgkz7ux+UntRIInYvfmMnoz6UBQ ubU1vcbCNaGa8Iijp9XhyQnZTf6q2NwlgW/HUROMd4wlXyZHDV556O20BmqpzTkBy1gi HRSbFs57JuuNgq1Mb0owIBdHpb7bK2YVdx0SocPVF0oWLBDcUaI+Fk2gjFPpit0GA8mx uetA== X-Gm-Message-State: AOAM531aS5K02IGwsFr4DAGPDyoiF6RBqJiYShBka3zNNZGs2ohkZ/Mm ntXF9chpsqug4pLsm7aO2ac= X-Google-Smtp-Source: ABdhPJxhP5ZH0S6JjeUHoDspfvyjzZ8blspiDaUFFPFJf+E2anXpyPAszr6BAwe+rS9ZvVI1Mni2yw== X-Received: by 2002:a50:fb0d:: with SMTP id d13mr1361390edq.85.1603446751699; Fri, 23 Oct 2020 02:52:31 -0700 (PDT) Received: from kozik-lap ([194.230.155.171]) by smtp.googlemail.com with ESMTPSA id p4sm506224eji.105.2020.10.23.02.52.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 23 Oct 2020 02:52:30 -0700 (PDT) Date: Fri, 23 Oct 2020 11:52:27 +0200 From: Krzysztof Kozlowski To: Adam Ford Cc: linux-arm-kernel@lists.infradead.org, marex@denx.de, l.stach@pengutronix.de, aford@beaconembedded.com, Rob Herring , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , Andrey Smirnov , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH 3/4] arm64: dts: imx8mn: add GPC node and power domains Message-ID: <20201023095227.GE42872@kozik-lap> References: <20201022150808.763082-1-aford173@gmail.com> <20201022150808.763082-4-aford173@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <20201022150808.763082-4-aford173@gmail.com> Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On Thu, Oct 22, 2020 at 10:08:06AM -0500, Adam Ford wrote: > This adds the DT nodes to describe the power domains available on the > i.MX8MN. There are four power domains, but the displaymix and mipi > power domains need a separate clock block controller which is also > pending for 8MP and 8MM. Once the path for those is clear, Nano will > need something similar, but the registers for Nano differ. For now, > the dispmix and mipi are placeholders. > > Signed-off-by: Adam Ford > > diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi b/arch/arm64/boot/dts/freescale/imx8mn.dtsi > index 9b4baf7bdfb1..27733fbe87e9 100644 > --- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi > +++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi > @@ -596,6 +596,55 @@ src: reset-controller@30390000 { > interrupts = ; > #reset-cells = <1>; > }; > + > + gpc: gpc@303a0000 { > + compatible = "fsl,imx8mn-gpc"; > + reg = <0x303a0000 0x10000>; > + interrupt-parent = <&gic>; > + interrupt-controller; > + #interrupt-cells = <3>; Missing interrupts. > + > + pgc { > + #address-cells = <1>; > + #size-cells = <0>; > + > + pgc_hsiomix: power-domain@0 { > + #power-domain-cells = <0>; > + reg = ; > + clocks = <&clk IMX8MN_CLK_USB_BUS>; > + }; > + > + pgc_otg1: power-domain@1 { > + #power-domain-cells = <0>; > + reg = ; > + power-domains = <&pgc_hsiomix>; > + }; > + > + pgc_gpumix: power-domain@2 { > + #power-domain-cells = <0>; > + reg = ; > + clocks = <&clk IMX8MN_CLK_GPU_CORE_ROOT>, > + <&clk IMX8MN_CLK_GPU_SHADER_DIV>, > + <&clk IMX8MN_CLK_GPU_BUS_ROOT>, > + <&clk IMX8MN_CLK_GPU_AHB>; > + resets = <&src IMX8MQ_RESET_GPU_RESET>; Does it compile without include? Did the include come via dependencies of this patch? Best regards, Krzysztof