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From: Rob Herring <robh@kernel.org>
To: Daniele Alessandrelli <daniele.alessandrelli@linux.intel.com>
Cc: Herbert Xu <herbert@gondor.apana.org.au>,
	"David S. Miller" <davem@davemloft.net>,
	linux-crypto@vger.kernel.org, devicetree@vger.kernel.org,
	Mark Gross <mgross@linux.intel.com>,
	Declan Murphy <declan.murphy@intel.com>,
	Daniele Alessandrelli <daniele.alessandrelli@intel.com>
Subject: Re: [PATCH 1/3] dt-bindings: crypto: Add Keem Bay OCS HCU bindings
Date: Mon, 26 Oct 2020 08:17:23 -0500	[thread overview]
Message-ID: <20201026131723.GA11033@bogus> (raw)
In-Reply-To: <20201016172759.1260407-2-daniele.alessandrelli@linux.intel.com>

On Fri, Oct 16, 2020 at 06:27:57PM +0100, Daniele Alessandrelli wrote:
> From: Declan Murphy <declan.murphy@intel.com>
> 
> Add device-tree bindings for the Intel Keem Bay Offload Crypto Subsystem
> (OCS) Hashing Control Unit (HCU) crypto driver.
> 
> Signed-off-by: Declan Murphy <declan.murphy@intel.com>
> Signed-off-by: Daniele Alessandrelli <daniele.alessandrelli@intel.com>
> Acked-by: Mark Gross <mgross@linux.intel.com>
> ---
>  .../crypto/intel,keembay-ocs-hcu.yaml         | 52 +++++++++++++++++++
>  1 file changed, 52 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/crypto/intel,keembay-ocs-hcu.yaml
> 
> diff --git a/Documentation/devicetree/bindings/crypto/intel,keembay-ocs-hcu.yaml b/Documentation/devicetree/bindings/crypto/intel,keembay-ocs-hcu.yaml
> new file mode 100644
> index 000000000000..dd4b82ee872b
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/crypto/intel,keembay-ocs-hcu.yaml
> @@ -0,0 +1,52 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/crypto/intel,keembay-ocs-hcu.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Intel Keem Bay OCS HCU Device Tree Bindings
> +
> +maintainers:
> +  - Declan Murphy <declan.murphy@intel.com>
> +  - Daniele Alessandrelli <deniele.alessandrelli@intel.com>

typo:                          ^?

> +
> +description: |

Can drop '|' if there's no formatting to preserve.

> +  The Intel Keem Bay Offload and Crypto Subsystem (OCS) Hash Control Unit (HCU)
> +  crypto driver enables use of the hardware accelerated hashing module embedded
> +  in the Intel Movidius SoC code name Keem Bay, via the kernel crypto API.

Don't put Linux details in bindings. Describe the h/w, not a driver.

> +
> +properties:
> +  compatible:
> +    const: intel,keembay-ocs-hcu
> +
> +  reg:
> +    items:
> +      - description: The OCS HCU base register address
> +
> +  interrupts:
> +    items:
> +      - description: OCS HCU interrupt
> +
> +  clocks:
> +    items:
> +      - description: OCS clock
> +
> +required:
> +  - compatible
> +  - reg
> +  - interrupts
> +  - clocks
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    #include <dt-bindings/interrupt-controller/arm-gic.h>
> +    hcu@3000b000 {

crypto@...

> +      compatible = "intel,keembay-ocs-hcu";
> +      reg = <0x3000b000 0x1000>;
> +      interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
> +      clocks = <&scmi_clk 94>;
> +    };
> +
> +...
> -- 
> 2.26.2
> 

  reply	other threads:[~2020-10-26 13:17 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-10-16 17:27 [PATCH 0/3] crypto: Add Keem Bay OCS HCU driver Daniele Alessandrelli
2020-10-16 17:27 ` [PATCH 1/3] dt-bindings: crypto: Add Keem Bay OCS HCU bindings Daniele Alessandrelli
2020-10-26 13:17   ` Rob Herring [this message]
2020-10-27 17:14     ` Daniele Alessandrelli
2020-10-16 17:27 ` [PATCH 2/3] crypto: keembay: Add Keem Bay OCS HCU driver Daniele Alessandrelli
2020-10-16 17:27 ` [PATCH 3/3] MAINTAINERS: Add maintainers for " Daniele Alessandrelli

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