From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.1 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 58BCDC4363A for ; Mon, 26 Oct 2020 20:08:46 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id D93BB21D41 for ; Mon, 26 Oct 2020 20:08:45 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1603742925; bh=gE/sIITsVCO5BsVa5oSz35w1rOcIP8GNNs7QyQPpNH4=; h=Date:From:To:Cc:Subject:References:In-Reply-To:List-ID:From; b=y22WALK3UW0NBe5AJSsMVWd0HriJtrw4uKfqi7PfUbkQjQ+R3U1DIafa9qTJi98aH vXG4Exs74FfiaQfxzYQUxsq8iXZpnQB5Xk7X+ICHCZf66KDATFi/YPobqXPyuw0TP2 1XM+8Z+muYRu7J6D4QHJHnPHzcdVh60glwAalrqk= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1725822AbgJZUIp (ORCPT ); Mon, 26 Oct 2020 16:08:45 -0400 Received: from mail-ed1-f68.google.com ([209.85.208.68]:37345 "EHLO mail-ed1-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725820AbgJZUIo (ORCPT ); Mon, 26 Oct 2020 16:08:44 -0400 Received: by mail-ed1-f68.google.com with SMTP id o18so10842794edq.4; Mon, 26 Oct 2020 13:08:43 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to; bh=QAhJNTcBuylpc827Gc8DE790mcWVOqgUgREe8IN9rGk=; b=XR9gLUYDNIEDvnlDYssdSnfC5D/4IO7PZYm7ffv+NKf1Ofm+ggyuwn6sQf8wDUs3h/ IeTSPjG0AbyPrCLZWyrruIAj6/oO6662jHlxVSnIBDDUXwEvWHQ+OQyXGe7KAcEKR+QU zWErCbkFsjIOFy6F/eevCNFW5SjdIb0fq3vMPyaZhngZacP2FfRWZkWQ2vby8vOfETgJ XBIPQqZSYAXapRetQLlvad16BzmYfPdSsd3ZiXQiqxTgQd57hHTffFP6Ppyc1OqOtCMm PUp9NGKSI/UTaCJmN+0I6gRkHsnjum1Is6sxtu5jR2xy30jEmioOPzleOptPNlshX0nM 3YYQ== X-Gm-Message-State: AOAM532R49Ly4ZnHyT/rX6Qaed9wZ0H9xpRPhKtbWfmxyPk3BoMn6Cu6 Q2lLbFQ+mEqk9T+ZoMqyjrg= X-Google-Smtp-Source: ABdhPJyeTtkh+7BD+iZP00A29Rs+E9CbsQNM30SNnmXJaudtE/elyiDZQpiu12bDhX/8rOr3FlmfEA== X-Received: by 2002:a50:fb0d:: with SMTP id d13mr17781115edq.85.1603742922751; Mon, 26 Oct 2020 13:08:42 -0700 (PDT) Received: from kozik-lap ([194.230.155.184]) by smtp.googlemail.com with ESMTPSA id f23sm6453141ejd.5.2020.10.26.13.08.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 26 Oct 2020 13:08:41 -0700 (PDT) Date: Mon, 26 Oct 2020 21:08:38 +0100 From: Krzysztof Kozlowski To: Yong Wu Cc: Joerg Roedel , Matthias Brugger , Rob Herring , Robin Murphy , Will Deacon , Evan Green , Tomasz Figa , linux-mediatek@lists.infradead.org, srv_heupstream@mediatek.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, iommu@lists.linux-foundation.org, youlin.pei@mediatek.com, Nicolas Boichat , anan.sun@mediatek.com, chao.hao@mediatek.com, ming-fan.chen@mediatek.com, Greg Kroah-Hartman , kernel-team@android.com Subject: Re: [PATCH v3 00/24] MT8192 IOMMU support Message-ID: <20201026200838.GB240203@kozik-lap> References: <20200930070647.10188-1-yong.wu@mediatek.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <20200930070647.10188-1-yong.wu@mediatek.com> Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On Wed, Sep 30, 2020 at 03:06:23PM +0800, Yong Wu wrote: > This patch mainly adds support for mt8192 IOMMU and SMI. > > mt8192 also is MTK IOMMU gen2 which uses ARM Short-Descriptor translation > table format. The M4U-SMI HW diagram is as below: > > EMI > | > M4U > | > ------------ > SMI Common > ------------ > | > +-------+------+------+----------------------+-------+ > | | | | ...... | | > | | | | | | > larb0 larb1 larb2 larb4 ...... larb19 larb20 > disp0 disp1 mdp vdec IPE IPE > > All the connections are HW fixed, SW can NOT adjust it. > > Comparing with the preview SoC, this patchset mainly adds two new functions: > a) add iova 34 bits support. > b) add multi domains support since several HW has the special iova > region requirement. > > this patchset depend on v5.9-rc1. Hi, I think there will be v4 of this, right? If yes, please also describe the dependencies between the patches. If the entire patchset is strictly ordered, then mention this as well. Best regards, Krzysztof