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[24.155.109.49]) by smtp.gmail.com with ESMTPSA id g3sm2824247oif.26.2020.10.28.08.38.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 28 Oct 2020 08:38:39 -0700 (PDT) Received: (nullmailer pid 4071712 invoked by uid 1000); Wed, 28 Oct 2020 15:38:38 -0000 Date: Wed, 28 Oct 2020 10:38:38 -0500 From: Rob Herring To: Bjorn Andersson Cc: Manivannan Sadhasivam , rjw@rjwysocki.net, viresh.kumar@linaro.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org Subject: Re: [PATCH v3 1/2] dt-bindings: arm: cpus: Document 'qcom,freq-domain' property Message-ID: <20201028153838.GA4065833@bogus> References: <20201020153944.18047-1-manivannan.sadhasivam@linaro.org> <20201026143203.GA112606@bogus> <20201026145108.GG12646@builder.lan> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20201026145108.GG12646@builder.lan> Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On Mon, Oct 26, 2020 at 09:51:08AM -0500, Bjorn Andersson wrote: > On Mon 26 Oct 09:32 CDT 2020, Rob Herring wrote: > > > On Tue, Oct 20, 2020 at 09:09:43PM +0530, Manivannan Sadhasivam wrote: > > > Add devicetree documentation for 'qcom,freq-domain' property specific > > > to Qualcomm CPUs. This property is used to reference the CPUFREQ node > > > along with Domain ID (0/1). > > > > > > Signed-off-by: Manivannan Sadhasivam > > > --- > > > Documentation/devicetree/bindings/arm/cpus.yaml | 6 ++++++ > > > 1 file changed, 6 insertions(+) > > > > > > diff --git a/Documentation/devicetree/bindings/arm/cpus.yaml b/Documentation/devicetree/bindings/arm/cpus.yaml > > > index 1222bf1831fa..f40564bf004f 100644 > > > --- a/Documentation/devicetree/bindings/arm/cpus.yaml > > > +++ b/Documentation/devicetree/bindings/arm/cpus.yaml > > > @@ -290,6 +290,12 @@ properties: > > > > > > * arm/msm/qcom,kpss-acc.txt > > > > > > + qcom,freq-domain: > > > + $ref: '/schemas/types.yaml#/definitions/phandle-array' > > > + description: | > > > + CPUs supporting freq-domain must set their "qcom,freq-domain" property > > > + with phandle to a cpufreq_hw node followed by the Domain ID(0/1). > > > > There's no 3 patches doing the same thing. Mediatek and SCMI are the > > others. This will need to be common. > > > > This property is used by existing dtbs for Qualcomm sdm845, sm8150, > sm8250 and sc7180 based devices, so I expect that the support for the > existing property will stay. Indeed. Any of these can tolerate a change here? We should still take QCom into account for whatever is come up with for a common binding. Rob