From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.5 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9A771C6379D for ; Sat, 7 Nov 2020 08:15:40 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 5668721707 for ; Sat, 7 Nov 2020 08:15:40 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=wdc.com header.i=@wdc.com header.b="NrGbMPtj" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728211AbgKGIPj (ORCPT ); Sat, 7 Nov 2020 03:15:39 -0500 Received: from esa3.hgst.iphmx.com ([216.71.153.141]:57208 "EHLO esa3.hgst.iphmx.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727801AbgKGIPj (ORCPT ); Sat, 7 Nov 2020 03:15:39 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=wdc.com; i=@wdc.com; q=dns/txt; s=dkim.wdc.com; t=1604736937; x=1636272937; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=MevOVNC0F9Lkbn4UeQ3BLTXn9yXhEtIsi4mHN2T0kJ8=; b=NrGbMPtjJFbc9/vCaCiZgEkmaQzC/Fwf6z0qYwXa0+ytfqXDalWJ2cdQ ZiYEMjN9aGCQDrZ30RcwBKCZyyc7uHqXAEOZC0V/YiRqQKSWaSP2OT/lG 8mpXfX5g6G8L9P9OKdd/FCs7DvJzTsyvE4ALh4IFIsdxntrQHCYrDPZyr RHUttPER/b71ysrXdesDACKyFX0MWyFgRgFJFQgNEAu+fNpJ7mHsnhwqb KXbxV102nITXQ6YMDqkEutKYgIrY3UXx74BabypVzC01AmpYBCrz67HCN zlN3g/TtRmw5M9uQKBooiSdKE5AUFttFt3f/x+pytPo+ENFcWRLqO+d5N g==; IronPort-SDR: jrCe27M1nfCvR3T9Tf1eCOVpRfnIUT2Ps+JRTtdlgIRkvxHZ2/VQH+gw5OmzH+zg+8VsTvFr0j wDks+h6IbIq6fLyMBfhR7JQ1WLo/FNByWDXXCgfUH4oTwaCQFjmBCeIRjCQCv9Ceo6aCm89U4y HZGzNYwk4S0mcCCaU1tjWPc8yTyTNzTtvKEAE7/Hlsq4BjY4hOKxYIEg+2bbG3wR8S8kAQ/jBE bkVQsrOAUlLEp8AMDIgmcxZ+C6wgiR+XY7l5mnTmaBcr+2QgVZWC71HdZFXSQXdN6fcC/2FTx/ XTQ= X-IronPort-AV: E=Sophos;i="5.77,459,1596470400"; d="scan'208";a="156564435" Received: from h199-255-45-15.hgst.com (HELO uls-op-cesaep02.wdc.com) ([199.255.45.15]) by ob1.hgst.iphmx.com with ESMTP; 07 Nov 2020 16:15:37 +0800 IronPort-SDR: hTyH3RkpyQdRaJGEZ3BPoxVt1F5gLrz0fxFTE67Fk+k9J5gAdc7qOZfPauR3xzJCk9AVVqThsJ 0l6K2LYxv8QKWJKQ1UyJLI0xu/HNRH6pfF+6ozvnEavdlpvIDlSKNRIqir2l/qEjJXPY4o7PdZ YUxj/Fn8LpK2F5/kJK4hgkHUGcwyW34llLKiWeP+ESdqvBQjZygQ3S5EDRjQyv1aWS6+QM8Okb hfT2GWGTvDk6wBB5uzUeeAIWqxBq1JmYv0d1/TCgI2BKtY5aLoT8HL46lCgrfHUTs04nAhuJI5 X+X5lPQSwMowF1H1HG0LOSfg Received: from uls-op-cesaip01.wdc.com ([10.248.3.36]) by uls-op-cesaep02.wdc.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Nov 2020 00:00:28 -0800 IronPort-SDR: iHc9bO5CQX/eWPe1AaEqyZ6T4+018t506iYLnnqFSvHCD+ZkebhjwAgxSe3mnhHw2APgvS182z 1r+3jcwy17MJU0QLhac7aimsEScFJfFvQucaLe8i3FUAOyZZ9quUryCSHKSqIEMLsES7dpvAr1 LUTGkqJ288yxUhlKxDzlCJ63ctVdmQzAGrPgcPvo6geb826DjCHJ9P9RbA5khgDZg10kvjaUNA QKOZ/pfbqV+qKlj8fJRdTQXrq11hje0U+hhkYDOJoOBPm7nN0bVDRvDMPUWogCXcMtm1nHcXBA 38U= WDCIronportException: Internal Received: from hdrdzf2.ad.shared (HELO twashi.fujisawa.hgst.com) ([10.84.71.85]) by uls-op-cesaip01.wdc.com with ESMTP; 07 Nov 2020 00:15:36 -0800 From: Damien Le Moal To: Palmer Dabbelt , linux-riscv@lists.infradead.org, Rob Herring , Frank Rowand , devicetree@vger.kernel.org, Serge Semin , Mark Brown , linux-spi@vger.kernel.org, Stephen Boyd , linux-clk@vger.kernel.org, Linus Walleij , linux-gpio@vger.kernel.org, Philipp Zabel Cc: Sean Anderson Subject: [PATCH 28/32] riscv: Add SiPeed MAIX DOCK board device tree Date: Sat, 7 Nov 2020 17:14:16 +0900 Message-Id: <20201107081420.60325-29-damien.lemoal@wdc.com> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20201107081420.60325-1-damien.lemoal@wdc.com> References: <20201107081420.60325-1-damien.lemoal@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add a device tree for the SiPeed MAIX DOCK m1 and m1w boards. This device tree enables LEDs, gpio, i2c and spi/mmc SD card devices. Signed-off-by: Damien Le Moal --- .../boot/dts/kendryte/k210_maix_dock.dts | 229 ++++++++++++++++++ 1 file changed, 229 insertions(+) create mode 100644 arch/riscv/boot/dts/kendryte/k210_maix_dock.dts diff --git a/arch/riscv/boot/dts/kendryte/k210_maix_dock.dts b/arch/riscv/boot/dts/kendryte/k210_maix_dock.dts new file mode 100644 index 000000000000..2ae8413b1e4c --- /dev/null +++ b/arch/riscv/boot/dts/kendryte/k210_maix_dock.dts @@ -0,0 +1,229 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2019-20 Sean Anderson + * Copyright (C) 2020 Western Digital Corporation or its affiliates. + */ + +/dts-v1/; + +#include "k210.dtsi" + +#include +#include + +/ { + model = "SiPeed MAIX Dock"; + compatible = "sipeed,maix-dock-m1wm", "sipeed,maix-dock-m1", + "kendryte,k210"; + + chosen { + bootargs = "earlycon console=ttySIF0"; + stdout-path = "serial0:115200n8"; + }; + + gpio-leds { + compatible = "gpio-leds"; + + /* + * Note: the board specification document green on gpio #4, + * red on gpio #5 and blue on gpio #6. However, the board + * is actually wired differently as defined here. + */ + blue { + gpios = <&gpio1_0 4 GPIO_ACTIVE_LOW>; + }; + + green { + gpios = <&gpio1_0 5 GPIO_ACTIVE_LOW>; + }; + + red { + gpios = <&gpio1_0 6 GPIO_ACTIVE_LOW>; + }; + }; + + gpio-keys { + compatible = "gpio-keys"; + + boot { + label = "BOOT"; + linux,code = ; + gpios = <&gpio0 0 GPIO_ACTIVE_LOW>; + }; + }; + + sound { + compatible = "simple-audio-card"; + simple-audio-card,format = "i2s"; + status = "disabled"; + + simple-audio-card,cpu { + sound-dai = <&i2s0 0>; + }; + + simple-audio-card,codec { + sound-dai = <&mic>; + }; + }; + + mic: mic { + #sound-dai-cells = <0>; + compatible = "memsensing,msm261s4030h0"; + status = "disabled"; + }; +}; + +&fpioa { + pinctrl-0 = <&fpioa_jtag>; + pinctrl-names = "default"; + status = "okay"; + + fpioa_jtag: jtag { + pinmux = , + , + , + ; + }; + + fpioa_uarths: uarths { + pinmux = , + ; + }; + + fpioa_gpio: gpio { + pinmux = , + , + , + , + , + ; + }; + + fpioa_gpiohs: gpiohs { + pinmux = , + , + , + , + , + , + , + , + , + , + ; + }; + + fpioa_i2s0: i2s0 { + pinmux = , + , + ; + }; + + fpioa_dvp: dvp { + pinmux = , + , + , + , + , + , + , + ; + }; + + fpioa_spi0: spi0 { + pinmux = , /* cs */ + , /* rst */ + , /* dc */ + ; /* wr */ + }; + + fpioa_spi1: spi1 { + pinmux = , + , + , + ; /* cs */ + }; + + fpioa_i2c1: i2c1 { + pinmux = , + ; + }; +}; + +&uarths0 { + pinctrl-0 = <&fpioa_uarths>; + pinctrl-names = "default"; + status = "okay"; +}; + +&gpio0 { + pinctrl-0 = <&fpioa_gpiohs>; + pinctrl-names = "default"; + status = "okay"; +}; + +&gpio1 { + pinctrl-0 = <&fpioa_gpio>; + pinctrl-names = "default"; + status = "okay"; +}; + +&i2s0 { + #sound-dai-cells = <1>; + pinctrl-0 = <&fpioa_i2s0>; + pinctrl-names = "default"; +}; + +&i2c1 { + pinctrl-0 = <&fpioa_i2c1>; + pinctrl-names = "default"; + clock-frequency = <400000>; + status = "okay"; +}; + +&dvp0 { + pinctrl-0 = <&fpioa_dvp>; + pinctrl-names = "default"; +}; + +&spi0 { + pinctrl-0 = <&fpioa_spi0>; + pinctrl-names = "default"; + num-cs = <1>; + cs-gpios = <&gpio0 20 0>; + + panel@0 { + compatible = "sitronix,st7789v"; + reg = <0>; + reset-gpios = <&gpio0 21 GPIO_ACTIVE_LOW>; + dc-gpios = <&gpio0 22 0>; + spi-max-frequency = <15000000>; + status = "disabled"; + }; +}; + +&spi1 { + pinctrl-0 = <&fpioa_spi1>; + pinctrl-names = "default"; + num-cs = <1>; + polling; + status = "okay"; + + slot@0 { + compatible = "mmc-spi-slot"; + reg = <0>; + voltage-ranges = <3300 3300>; + spi-max-frequency = <4000000>; + broken-cd; + }; +}; + +&spi3 { + spi-flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <50000000>; + m25p,fast-read; + broken-flash-reset; + }; +}; -- 2.28.0