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[24.155.109.49]) by smtp.gmail.com with ESMTPSA id m3sm558145oim.36.2020.11.09.08.15.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 09 Nov 2020 08:15:33 -0800 (PST) Received: (nullmailer pid 1384738 invoked by uid 1000); Mon, 09 Nov 2020 16:15:32 -0000 Date: Mon, 9 Nov 2020 10:15:32 -0600 From: Rob Herring To: Daniele Alessandrelli Cc: Herbert Xu , "David S. Miller" , linux-crypto@vger.kernel.org, devicetree@vger.kernel.org, Mark Gross , Declan Murphy , Daniele Alessandrelli Subject: Re: [PATCH v2 1/3] dt-bindings: crypto: Add Keem Bay OCS HCU bindings Message-ID: <20201109161532.GA1382203@bogus> References: <20201103184925.294456-1-daniele.alessandrelli@linux.intel.com> <20201103184925.294456-2-daniele.alessandrelli@linux.intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20201103184925.294456-2-daniele.alessandrelli@linux.intel.com> Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On Tue, Nov 03, 2020 at 06:49:23PM +0000, Daniele Alessandrelli wrote: > From: Declan Murphy > > Add device-tree bindings for the Intel Keem Bay Offload Crypto Subsystem > (OCS) Hashing Control Unit (HCU) crypto driver. > > Signed-off-by: Declan Murphy > Signed-off-by: Daniele Alessandrelli > Acked-by: Mark Gross > --- > .../crypto/intel,keembay-ocs-hcu.yaml | 51 +++++++++++++++++++ > 1 file changed, 51 insertions(+) > create mode 100644 Documentation/devicetree/bindings/crypto/intel,keembay-ocs-hcu.yaml > > diff --git a/Documentation/devicetree/bindings/crypto/intel,keembay-ocs-hcu.yaml b/Documentation/devicetree/bindings/crypto/intel,keembay-ocs-hcu.yaml > new file mode 100644 > index 000000000000..cc03e2b66d5a > --- /dev/null > +++ b/Documentation/devicetree/bindings/crypto/intel,keembay-ocs-hcu.yaml > @@ -0,0 +1,51 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/crypto/intel,keembay-ocs-hcu.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Intel Keem Bay OCS HCU Device Tree Bindings > + > +maintainers: > + - Declan Murphy > + - Daniele Alessandrelli > + > +description: > + The Intel Keem Bay Offload and Crypto Subsystem (OCS) Hash Control Unit (HCU) > + provides hardware-accelerated hashing and HMAC. > + > +properties: > + compatible: > + const: intel,keembay-ocs-hcu > + > + reg: > + items: > + - description: The OCS HCU base register address Just need 'maxItems: 1' if there's only 1. The description doesn't add anything. > + > + interrupts: > + items: > + - description: OCS HCU interrupt Same here > + > + clocks: > + items: > + - description: OCS clock And here. > + > +required: > + - compatible > + - reg > + - interrupts > + - clocks > + > +additionalProperties: false > + > +examples: > + - | > + #include > + crypto@3000b000 { > + compatible = "intel,keembay-ocs-hcu"; > + reg = <0x3000b000 0x1000>; > + interrupts = ; > + clocks = <&scmi_clk 94>; > + }; > + > +... > -- > 2.26.2 >