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[104.57.184.186]) by smtp.gmail.com with ESMTPSA id 66sm277848otp.33.2020.11.10.20.37.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 10 Nov 2020 20:37:22 -0800 (PST) Date: Tue, 10 Nov 2020 22:37:20 -0600 From: Bjorn Andersson To: Georgi Djakov Cc: linux-pm@vger.kernel.org, mdtipton@codeaurora.org, devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, akashast@codeaurora.org Subject: Re: [PATCH 1/3] dt-bindings: interconnect: sdm845: Add IDs for the QUP ports Message-ID: <20201111043720.GB173948@builder.lan> References: <20201105135211.7160-1-georgi.djakov@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20201105135211.7160-1-georgi.djakov@linaro.org> Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On Thu 05 Nov 07:52 CST 2020, Georgi Djakov wrote: > The QUP ports exist in the topology, but are not exposed as an > endpoints in DT. Fix this by creating IDs and attach them to their > NoCs, so that the various QUP drivers (i2c/spi/uart etc.) are able > to request their interconnect paths and scale their bandwidth. > > Signed-off-by: Georgi Djakov Reviewed-by: Bjorn Andersson Regards, Bjorn > --- > include/dt-bindings/interconnect/qcom,sdm845.h | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/include/dt-bindings/interconnect/qcom,sdm845.h b/include/dt-bindings/interconnect/qcom,sdm845.h > index 290be38f40e6..67b500e24915 100644 > --- a/include/dt-bindings/interconnect/qcom,sdm845.h > +++ b/include/dt-bindings/interconnect/qcom,sdm845.h > @@ -19,6 +19,7 @@ > #define SLAVE_A1NOC_SNOC 7 > #define SLAVE_SERVICE_A1NOC 8 > #define SLAVE_ANOC_PCIE_A1NOC_SNOC 9 > +#define MASTER_QUP_1 10 > > #define MASTER_A2NOC_CFG 0 > #define MASTER_QDSS_BAM 1 > @@ -32,6 +33,7 @@ > #define SLAVE_A2NOC_SNOC 9 > #define SLAVE_ANOC_PCIE_SNOC 10 > #define SLAVE_SERVICE_A2NOC 11 > +#define MASTER_QUP_2 12 > > #define MASTER_SPDM 0 > #define MASTER_TIC 1