[PATCH v2 2/5] dt-bindings: interrupt-controller: Add binding for few Microsemi interrupt controllers

Gregory CLEMENT
2020-11-12T16:04:35Z

Add the Device Tree binding documentation for the Microsemi Jaguar2,
Luton and Serval interrupt controller that is part of the ICPU. It is
connected directly to the MIPS core interrupt controller.

Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
---
.../bindings/interrupt-controller/mscc,ocelot-icpu-intr.yaml | 4 ++++
1 file changed, 4 insertions(+)

diff --git a/Documentation/devicetree/bindings/interrupt-controller/mscc,ocelot-icpu-intr.yaml b/Documentation/devicetree/bindings/interrupt-controller/mscc,ocelot-icpu-intr.yaml
index afd00f9c9d74..e2f093faa906 100644
--- a/Documentation/devicetree/bindings/interrupt-controller/mscc,ocelot-icpu-intr.yaml
+++ b/Documentation/devicetree/bindings/interrupt-controller/mscc,ocelot-icpu-intr.yaml
@@ -21,7 +21,11 @@ properties:
compatible:
items:
- enum:
+ - mscc,jaguar2-icpu-intr
+ - mscc,luton-icpu-intr
- mscc,ocelot-icpu-intr
+ - mscc,serval-icpu-intr
+

'#interrupt-cells':
const: 1
--
2.28.0