From: Andrew Lunn <andrew@lunn.ch>
To: Marek Behun <marek.behun@nic.cz>
Cc: Pavana Sharma <pavana.sharma@digi.com>,
lkp@intel.com, ashkan.boldaji@digi.com,
clang-built-linux@googlegroups.com, davem@davemloft.net,
f.fainelli@gmail.com, gregkh@linuxfoundation.org,
kbuild-all@lists.01.org, kuba@kernel.org,
linux-kernel@vger.kernel.org, netdev@vger.kernel.org,
robh+dt@kernel.org, devicetree@vger.kernel.org,
vivien.didelot@gmail.com
Subject: Re: [PATCH v10 4/4] net: dsa: mv88e6xxx: Add support for mv88e6393x family of Marvell
Date: Fri, 20 Nov 2020 02:54:36 +0100 [thread overview]
Message-ID: <20201120015436.GC1804098@lunn.ch> (raw)
In-Reply-To: <20201120024311.5021d6b7@nic.cz>
On Fri, Nov 20, 2020 at 02:43:11AM +0100, Marek Behun wrote:
> Hi Andrew,
>
> On Fri, 20 Nov 2020 02:29:06 +0100
> Andrew Lunn <andrew@lunn.ch> wrote:
>
> > > + if (speed >= 2500 && port > 0 && port < 9)
> > > + return -EOPNOTSUPP;
> >
> > Maybe i'm missing something, but it looks like at this point you can
> > call
> >
> > return mv88e6xxx_port_set_speed_duplex(chip, port, speed, true, true, duplex);
>
> He can't. That function does not support speed 5000. You can't simply
> add it, because it clashes with register value for speed 2500 on
> previous switches (Peridot, Topaz).
>
> Amethyst reg val Peridot + Topaz reg val
> 2500 SPD_1000 | ALT_BIT SPD_10000 | ALT_BIT
> 5000 SPD_10000 | ALT_BIT not supported
> 10000 SPD_UNFORCED SPD_UNFORCED
Hi Marek
O.K, as i said, i might be missing something :-)
I think a comment would be nice, pointing this out. Otherwise somebody
might try refactoring it, and make the same mistake!
Andrew
next prev parent reply other threads:[~2020-11-20 1:55 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <202011200314.9VHqJ9Lm-lkp@intel.com>
2020-11-20 0:24 ` [PATCH v10 0/4] Add support for mv88e6393x family of Marvell Pavana Sharma
2020-11-20 0:25 ` [PATCH v10 1/4] dt-bindings: net: Add 5GBASER phy interface mode Pavana Sharma
2020-11-20 0:52 ` Andrew Lunn
2020-11-20 0:25 ` [PATCH v10 2/4] net: phy: Add 5GBASER " Pavana Sharma
2020-11-20 0:55 ` Andrew Lunn
2020-11-20 0:26 ` [PATCH v10 3/4] net: dsa: mv88e6xxx: Change serdes lane parameter from u8 type to int Pavana Sharma
2020-11-20 0:59 ` Andrew Lunn
2020-11-20 0:26 ` [PATCH v10 4/4] net: dsa: mv88e6xxx: Add support for mv88e6393x family of Marvell Pavana Sharma
2020-11-20 1:29 ` Andrew Lunn
2020-11-20 1:43 ` Marek Behun
2020-11-20 1:54 ` Andrew Lunn [this message]
2020-12-09 5:02 ` [PATCH v11 0/4] " Pavana Sharma
2020-12-09 5:03 ` [PATCH v11 1/4] dt-bindings: net: Add 5GBASER phy interface mode Pavana Sharma
2020-12-09 23:15 ` Andrew Lunn
2020-12-10 13:43 ` Pavana Sharma
2020-12-09 5:04 ` [PATCH v11 2/4] net: phy: Add 5GBASER " Pavana Sharma
2020-12-09 23:18 ` Andrew Lunn
2020-12-09 5:05 ` [PATCH v11 3/4] net: dsa: mv88e6xxx: Change serdes lane parameter type from u8 type to int Pavana Sharma
2020-12-09 23:24 ` Andrew Lunn
2020-12-09 5:05 ` [PATCH v11 4/4] net: dsa: mv88e6xxx: Add support for mv88e6393x family of Marvell Pavana Sharma
2020-12-09 23:40 ` Andrew Lunn
2020-12-09 19:37 ` [PATCH v11 0/4] " Jakub Kicinski
2020-12-11 12:44 ` [net-next PATCH v12 " Pavana Sharma
2020-12-11 12:46 ` [net-next PATCH v12 1/4] dt-bindings: net: Add 5GBASER phy interface mode Pavana Sharma
2020-12-14 22:56 ` Rob Herring
2020-12-11 12:46 ` [net-next PATCH v12 2/4] net: phy: Add 5GBASER " Pavana Sharma
2020-12-11 12:49 ` [net-next PATCH v12 3/4] net: dsa: mv88e6xxx: Change serdes lane parameter type from u8 type to int Pavana Sharma
2020-12-11 12:51 ` [net-next PATCH v12 4/4] net: dsa: mv88e6xxx: Add support for mv88e6393x family of Marvell Pavana Sharma
2021-01-05 12:15 ` Marek Behún
2021-01-06 0:45 ` Pavana Sharma
2021-01-06 12:20 ` Marek Behún
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