Re: [PATCH v2 2/2] spi: orion: enable support for switching CS every transferred byte

[Mark Brown <broonie@kernel.org>]

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On Thu, Dec 17, 2020 at 07:09:32PM +0200, kostap@marvell.com wrote:

> +++ b/drivers/spi/spi-orion.c
> @@ -369,8 +369,15 @@ orion_spi_write_read_8bit(struct spi_device *spi,
>  {

This is only supporting SPI_CS_WORD for 8 bit operations but the driver
also supports 16 bit words, it should at least report an error if
there's an attempt to use SPI_CS_WORD for 16 bit transfers.  It also
looks like this won't work on systems where direct access is supported
since those use a separate I/O path, that can be fixed by just adding an
additional check when deciding to go down that path.

The driver should also pay attention to SPI_CS_HIGH if it's going to try
to control chip select by hand as it does, which is generally frowned
upon.  TBH I'm wondering if it might not be better to just rely on the
core support for implementing SPI_CS_WORD on controllers that can't do
it in hardware - it *is* much higher overhead since it needs to split
the transfers up but it depends how performance critical and frequent
access to such devices is likely to be.

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