From: Krzysztof Kozlowski <krzk@kernel.org>
To: Jagan Teki <jagan@amarulasolutions.com>
Cc: Rob Herring <robh+dt@kernel.org>, Shawn Guo <shawnguo@kernel.org>,
Li Yang <leoyang.li@nxp.com>, Fabio Estevam <festevam@gmail.com>,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
NXP Linux Team <linux-imx@nxp.com>,
linux-amarula@amarulasolutions.com,
Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will@kernel.org>,
Matteo Lisi <matteo.lisi@engicam.com>
Subject: Re: [PATCH v2 4/6] arm64: dts: imx8mm: Add Engicam i.Core MX8M Mini C.TOUCH 2.0
Date: Mon, 21 Dec 2020 15:01:42 +0100 [thread overview]
Message-ID: <20201221140142.GD31176@kozik-lap> (raw)
In-Reply-To: <20201221113151.94515-5-jagan@amarulasolutions.com>
On Mon, Dec 21, 2020 at 05:01:49PM +0530, Jagan Teki wrote:
> Engicam C.TOUCH 2.0 is an EDIMM compliant general purpose Carrier
> board.
>
> Genaral features:
> - Ethernet 10/100
> - Wifi/BT
> - USB Type A/OTG
> - Audio Out
> - CAN
> - LVDS panel connector
>
> i.Core MX8M Mini is an EDIMM SoM based on NXP i.MX8M Mini from Engicam.
>
> i.Core MX8M Mini needs to mount on top of this Carrier board for
> creating complete i.Core MX8M Mini C.TOUCH 2.0 board.
>
> Add support for it.
>
> Signed-off-by: Matteo Lisi <matteo.lisi@engicam.com>
> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
> ---
> Changes for v2:
> - enabled fec1 node
> - updated commit message
> - dropped engicam from filename since it aligned with imx6 engicam
> dts files naming conventions.
> - add i2c nodes
> - fixed v1 comments
>
> arch/arm64/boot/dts/freescale/Makefile | 1 +
> .../dts/freescale/imx8mm-engicam-common.dtsi | 82 +++++++++++++++++++
> .../dts/freescale/imx8mm-engicam-ctouch2.dtsi | 7 ++
> .../freescale/imx8mm-icore-mx8mm-ctouch2.dts | 21 +++++
> 4 files changed, 111 insertions(+)
> create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-engicam-common.dtsi
> create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-engicam-ctouch2.dtsi
> create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-icore-mx8mm-ctouch2.dts
>
> diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile
> index 6f0777ee6cd6..8d49a2c74604 100644
> --- a/arch/arm64/boot/dts/freescale/Makefile
> +++ b/arch/arm64/boot/dts/freescale/Makefile
> @@ -32,6 +32,7 @@ dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2162a-qds.dtb
> dtb-$(CONFIG_ARCH_MXC) += imx8mm-beacon-kit.dtb
> dtb-$(CONFIG_ARCH_MXC) += imx8mm-evk.dtb
> dtb-$(CONFIG_ARCH_MXC) += imx8mm-ddr4-evk.dtb
> +dtb-$(CONFIG_ARCH_MXC) += imx8mm-icore-mx8mm-ctouch2.dtb
> dtb-$(CONFIG_ARCH_MXC) += imx8mm-kontron-n801x-s.dtb
> dtb-$(CONFIG_ARCH_MXC) += imx8mm-var-som-symphony.dtb
> dtb-$(CONFIG_ARCH_MXC) += imx8mn-evk.dtb
> diff --git a/arch/arm64/boot/dts/freescale/imx8mm-engicam-common.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-engicam-common.dtsi
> new file mode 100644
> index 000000000000..f7870efd9dab
> --- /dev/null
> +++ b/arch/arm64/boot/dts/freescale/imx8mm-engicam-common.dtsi
> @@ -0,0 +1,82 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +/*
> + * Copyright (c) 2020 Engicam srl
> + * Copyright (c) 2020 Amarula Solutions(India)
> + */
> +
> +&fec1 {
> + status = "okay";
> +};
> +
> +&i2c2 {
> + clock-frequency = <400000>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_i2c2>;
> + status = "okay";
> +};
> +
> +&i2c4 {
> + clock-frequency = <100000>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_i2c4>;
> + status = "okay";
> +};
> +
> +&iomuxc {
> + pinctrl_i2c2: i2c2grp {
> + fsl,pins = <
> + MX8MM_IOMUXC_I2C2_SCL_I2C2_SCL 0x400001c3
> + MX8MM_IOMUXC_I2C2_SDA_I2C2_SDA 0x400001c3
> + >;
> + };
> +
> + pinctrl_i2c4: i2c4grp {
> + fsl,pins = <
> + MX8MM_IOMUXC_I2C4_SCL_I2C4_SCL 0x400001c3
> + MX8MM_IOMUXC_I2C4_SDA_I2C4_SDA 0x400001c3
> + >;
> + };
> +
> + pinctrl_uart2: uart2grp {
> + fsl,pins = <
> + MX8MM_IOMUXC_UART2_RXD_UART2_DCE_RX 0x140
> + MX8MM_IOMUXC_UART2_TXD_UART2_DCE_TX 0x140
> + >;
> + };
> +
> + pinctrl_usdhc1_gpio: usdhc1gpiogrp {
> + fsl,pins = <
> + MX8MM_IOMUXC_GPIO1_IO06_GPIO1_IO6 0x41
> + >;
> + };
> +
> + pinctrl_usdhc1: usdhc1grp {
> + fsl,pins = <
> + MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK 0x190
> + MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD 0x1d0
> + MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0 0x1d0
> + MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1 0x1d0
> + MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2 0x1d0
> + MX8MM_IOMUXC_SD1_DATA3_USDHC1_DATA3 0x1d0
> + >;
> + };
> +};
> +
> +&uart2 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_uart2>;
> + status = "okay";
> +};
> +
> +/* SD */
> +&usdhc1 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_usdhc1>, <&pinctrl_usdhc1_gpio>;
> + cd-gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
> + max-frequency = <50000000>;
> + bus-width = <4>;
> + no-1-8-v;
> + pm-ignore-notify;
> + keep-power-in-suspend;
> + status = "okay";
> +};
> diff --git a/arch/arm64/boot/dts/freescale/imx8mm-engicam-ctouch2.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-engicam-ctouch2.dtsi
> new file mode 100644
> index 000000000000..294df07289a2
> --- /dev/null
> +++ b/arch/arm64/boot/dts/freescale/imx8mm-engicam-ctouch2.dtsi
> @@ -0,0 +1,7 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +/*
> + * Copyright (c) 2020 Engicam srl
> + * Copyright (c) 2020 Amarula Solutions(India)
> + */
> +
> +#include "imx8mm-engicam-common.dtsi"
The same as before - a DTSI file to include a DTSI. Remove it.
Best regards,
Krzysztof
next prev parent reply other threads:[~2020-12-21 14:02 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-12-21 11:31 [PATCH v2 0/6] arm64: dts: imx8mm: Add Engicam i.Core MX8M Mini Jagan Teki
2020-12-21 11:31 ` [PATCH v2 1/6] arm64: defconfig: Enable REGULATOR_PF8X00 Jagan Teki
2020-12-21 13:42 ` Krzysztof Kozlowski
2020-12-21 11:31 ` [PATCH v2 2/6] dt-bindings: arm: fsl: Add Engicam i.Core MX8M Mini C.TOUCH 2.0 Jagan Teki
2020-12-21 13:46 ` Krzysztof Kozlowski
2020-12-21 13:59 ` Jagan Teki
2020-12-21 14:05 ` Krzysztof Kozlowski
2020-12-21 14:39 ` Jagan Teki
2020-12-21 14:42 ` Krzysztof Kozlowski
2020-12-21 14:47 ` Jagan Teki
2020-12-22 18:28 ` Jagan Teki
2020-12-22 20:25 ` Krzysztof Kozlowski
2020-12-22 20:32 ` Krzysztof Kozlowski
2020-12-21 11:31 ` [PATCH v2 3/6] arm64: dts: imx8mm: Add Engicam i.Core MX8M Mini SoM Jagan Teki
2020-12-21 13:52 ` Krzysztof Kozlowski
2020-12-21 11:31 ` [PATCH v2 4/6] arm64: dts: imx8mm: Add Engicam i.Core MX8M Mini C.TOUCH 2.0 Jagan Teki
2020-12-21 14:01 ` Krzysztof Kozlowski [this message]
2020-12-21 11:31 ` [PATCH v2 5/6] dt-bindings: arm: fsl: Add Engicam i.Core MX8M Mini EDIMM2.2 Starter Kit Jagan Teki
2020-12-21 11:31 ` [PATCH v2 6/6] arm64: dts: imx8mm: " Jagan Teki
2020-12-21 14:06 ` Krzysztof Kozlowski
2020-12-21 19:33 ` Jagan Teki
2020-12-21 21:06 ` Krzysztof Kozlowski
2020-12-22 8:50 ` Jagan Teki
2020-12-22 8:53 ` Krzysztof Kozlowski
2020-12-22 9:05 ` Jagan Teki
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20201221140142.GD31176@kozik-lap \
--to=krzk@kernel.org \
--cc=catalin.marinas@arm.com \
--cc=devicetree@vger.kernel.org \
--cc=festevam@gmail.com \
--cc=jagan@amarulasolutions.com \
--cc=leoyang.li@nxp.com \
--cc=linux-amarula@amarulasolutions.com \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-imx@nxp.com \
--cc=linux-kernel@vger.kernel.org \
--cc=matteo.lisi@engicam.com \
--cc=robh+dt@kernel.org \
--cc=shawnguo@kernel.org \
--cc=will@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).