From: <conor.dooley@microchip.com>
To: <robh+dt@kernel.org>, <damien.lemoal@wdc.com>,
<jassisinghbrar@gmail.com>, <aou@eecs.berkeley.edu>,
<paul.walmsley@sifive.com>, <palmer@dabbelt.com>,
<devicetree@vger.kernel.org>, <linux-riscv@lists.infradead.org>
Cc: <lewis.hanly@microchip.com>, <cyril.jean@microchip.com>,
<daire.mcnamara@microchip.com>, <atish.patra@wdc.com>,
<anup.patel@wdc.com>, <david.abdurachmanov@gmail.com>,
<j.neuschaefer@gmx.net>,
Conor Dooley <conor.dooley@microchip.com>
Subject: [PATCH v3 2/5] dt-bindings: add bindings for polarfire soc mailbox
Date: Wed, 23 Dec 2020 16:33:02 +0000 [thread overview]
Message-ID: <20201223163302.29057-1-conor.dooley@microchip.com> (raw)
From: Conor Dooley <conor.dooley@microchip.com>
Add device tree bindings for the MSS system controller mailbox on
the Microchip PolarFire SoC.
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
---
.../mailbox/microchip,mailbox-mpfs.yaml | 47 +++++++++++++++++++
1 file changed, 47 insertions(+)
create mode 100644 Documentation/devicetree/bindings/mailbox/microchip,mailbox-mpfs.yaml
diff --git a/Documentation/devicetree/bindings/mailbox/microchip,mailbox-mpfs.yaml b/Documentation/devicetree/bindings/mailbox/microchip,mailbox-mpfs.yaml
new file mode 100644
index 000000000000..c5b126c6fb66
--- /dev/null
+++ b/Documentation/devicetree/bindings/mailbox/microchip,mailbox-mpfs.yaml
@@ -0,0 +1,47 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: "http://devicetree.org/schemas/mailbox/microchip,mailbox-mpfs.yaml#"
+$schema: "http://devicetree.org/meta-schemas/core.yaml#"
+
+title: Microchip PolarFire SoC (MPFS) mss mailbox controller
+
+maintainers:
+ - Conor Dooley <conor.dooley@microchip.com>
+
+properties:
+ compatible:
+ const: microchip,polarfire-soc-mailbox
+
+ reg:
+ items:
+ - description: mailbox data registers
+ - description: mailbox int registers
+
+ interrupts:
+ maxItems: 1
+
+ "#mbox-cells":
+ const: 1
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - "#mbox-cells"
+
+additionalProperties: false
+
+examples:
+ - |
+ soc {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ mbox: mailbox@37020000 {
+ compatible = "microchip,polarfire-soc-mailbox";
+ reg = <0x0 0x37020000 0x0 0x1000>, <0x0 0x2000318c 0x0 0x40>;
+ interrupt-parent = <&L1>;
+ interrupts = <96>;
+ #mbox-cells = <1>;
+ };
+ };
--
2.17.1
next prev reply other threads:[~2020-12-23 16:34 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-12-23 16:32 [PATCH v3 0/5] Add support for the PolarFire SoC system controller conor.dooley
2020-12-23 16:32 ` [PATCH v3 1/5] mbox: add polarfire soc system controller mailbox conor.dooley
2021-01-02 13:01 ` Jonathan Neuschäfer
2021-01-21 12:46 ` Conor.Dooley
2021-01-21 13:38 ` Jonathan Neuschäfer
2020-12-23 16:33 ` conor.dooley [this message]
2020-12-31 18:34 ` [PATCH v3 2/5] dt-bindings: add bindings for polarfire soc mailbox Rob Herring
2021-01-02 11:30 ` Jonathan Neuschäfer
2020-12-23 16:33 ` [PATCH v3 4/5] dt-bindings: add bindings for polarfire soc system controller conor.dooley
2021-01-05 21:25 ` Jonathan Neuschäfer
2021-01-08 2:31 ` Rob Herring
2021-01-06 19:25 ` [PATCH v3 0/5] Add support for the PolarFire SoC " Atish Patra
2021-01-07 11:49 ` Cyril.Jean
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