From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.6 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E7289C433DB for ; Mon, 28 Dec 2020 11:28:56 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 9FF72229C5 for ; Mon, 28 Dec 2020 11:28:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727019AbgL1L2l (ORCPT ); Mon, 28 Dec 2020 06:28:41 -0500 Received: from www.zeus03.de ([194.117.254.33]:37772 "EHLO mail.zeus03.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727363AbgL1L2k (ORCPT ); Mon, 28 Dec 2020 06:28:40 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=simple; d=sang-engineering.com; h= from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; s=k1; bh=CLhOPFEJVR+TzA e+nHEahGEsCwUVk3be+Yt7VkTUhBc=; b=Np0/W1/xSiNUAnBvuXz7AB5RQpqO9K C3natCMXeQHAVJiT3pDPaJfzPIhV9S28kUVBP9QDlEFsBNM9tUfxfwyvEGbUkLoz tGCe/N56UVSMnlw+JjwPm6EdH5CO1pPvtrNDHsBFklY/LowHlILfi0Ay+ntWdLYR MdBpxjSQQC03w= Received: (qmail 1739157 invoked from network); 28 Dec 2020 12:27:19 +0100 Received: by mail.zeus03.de with ESMTPSA (TLS_AES_256_GCM_SHA384 encrypted, authenticated); 28 Dec 2020 12:27:19 +0100 X-UD-Smtp-Session: l3s3148p1@YteUjoS30JQgAwDPXwIpAOUwDQytQs2L From: Wolfram Sang To: linux-renesas-soc@vger.kernel.org Cc: Wolfram Sang , Geert Uytterhoeven , Magnus Damm , Rob Herring , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 6/6] WIP: arm64: dts: renesas: falcon: switch to from SCIF0 to HSCIF0 Date: Mon, 28 Dec 2020 12:27:13 +0100 Message-Id: <20201228112715.14947-7-wsa+renesas@sang-engineering.com> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20201228112715.14947-1-wsa+renesas@sang-engineering.com> References: <20201228112715.14947-1-wsa+renesas@sang-engineering.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Mainly for testing the HSCIF0 node. We could make this switch permanent, but we never did for any other SoC. So, I think this is not to be applied. Signed-off-by: Wolfram Sang --- arch/arm64/boot/dts/renesas/r8a779a0-falcon.dts | 14 +++++++++----- 1 file changed, 9 insertions(+), 5 deletions(-) diff --git a/arch/arm64/boot/dts/renesas/r8a779a0-falcon.dts b/arch/arm64/boot/dts/renesas/r8a779a0-falcon.dts index 54763c73dc74..e2bbaa7a72e3 100644 --- a/arch/arm64/boot/dts/renesas/r8a779a0-falcon.dts +++ b/arch/arm64/boot/dts/renesas/r8a779a0-falcon.dts @@ -14,7 +14,7 @@ / { compatible = "renesas,falcon-breakout", "renesas,falcon-cpu", "renesas,r8a779a0"; aliases { - serial0 = &scif0; + serial0 = &hscif0; }; chosen { @@ -352,9 +352,9 @@ mmc_pins: mmc { power-source = <1800>; }; - scif0_pins: scif0 { - groups = "scif0_data", "scif0_ctrl"; - function = "scif0"; + hscif0_pins: hscif0 { + groups = "hscif0_data", "hscif0_ctrl"; + function = "hscif0"; }; scif_clk_pins: scif_clk { @@ -369,7 +369,11 @@ &rwdt { }; &scif0 { - pinctrl-0 = <&scif0_pins>; + status = "disabled"; +}; + +&hscif0 { + pinctrl-0 = <&hscif0_pins>; pinctrl-names = "default"; uart-has-rtscts; -- 2.29.2