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From: Rob Herring <robh@kernel.org>
To: conor.dooley@microchip.com
Cc: damien.lemoal@wdc.com, jassisinghbrar@gmail.com,
	aou@eecs.berkeley.edu, paul.walmsley@sifive.com,
	palmer@dabbelt.com, devicetree@vger.kernel.org,
	linux-riscv@lists.infradead.org, lewis.hanly@microchip.com,
	cyril.jean@microchip.com, daire.mcnamara@microchip.com,
	atish.patra@wdc.com, anup.patel@wdc.com,
	david.abdurachmanov@gmail.com, j.neuschaefer@gmx.net
Subject: Re: [PATCH v3 4/5] dt-bindings: add bindings for polarfire soc system controller
Date: Thu, 7 Jan 2021 19:31:21 -0700	[thread overview]
Message-ID: <20210108023121.GA1750857@robh.at.kernel.org> (raw)
In-Reply-To: <20201223163316.29186-1-conor.dooley@microchip.com>

On Wed, Dec 23, 2020 at 04:33:16PM +0000, conor.dooley@microchip.com wrote:
> From: Conor Dooley <conor.dooley@microchip.com>
> 
> Add device tree bindings for the MSS system controller on
> the Microchip PolarFire SoC.
> 
> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
> ---
>  .../microchip,mpfs_sys_controller.yaml        | 34 +++++++++++++++++++
>  1 file changed, 34 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/soc/microchip/microchip,mpfs_sys_controller.yaml
> 
> diff --git a/Documentation/devicetree/bindings/soc/microchip/microchip,mpfs_sys_controller.yaml b/Documentation/devicetree/bindings/soc/microchip/microchip,mpfs_sys_controller.yaml
> new file mode 100644
> index 000000000000..60fde1925910
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/soc/microchip/microchip,mpfs_sys_controller.yaml
> @@ -0,0 +1,34 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: "http://devicetree.org/schemas/soc/microchip/microchip,mpfs_sys_controller.yaml#"
> +$schema: "http://devicetree.org/meta-schemas/core.yaml#"
> +
> +title: Microchip PolarFire SoC (MPFS) system controller
> +
> +maintainers:
> +  - Conor Dooley <conor.dooley@microchip.com>

'description'?

Perhaps including some info about what this block does and how it is 
accessed.

> +
> +properties:
> +  compatible:
> +    const: microchip,polarfire-soc-sys-controller
> +
> +  mboxes:
> +    $ref: '/schemas/types.yaml#/definitions/phandle-array'
> +    description: |
> +      phandle and index of the mailbox controller device node.
> +      See: ../mailbox/mailbox.txt for more information.

All this is defined already in the common binding schema, drop.

> +    maxItems: 1
> +
> +required:
> +  - compatible
> +  - "mboxes"

Don't need quotes.

> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    syscontroller: syscontroller {
> +      compatible = "microchip,polarfire-soc-sys-controller";
> +      mboxes = <&mbox 0>;
> +    };
> -- 
> 2.17.1
> 

  parent reply	other threads:[~2021-01-08  2:32 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-12-23 16:32 [PATCH v3 0/5] Add support for the PolarFire SoC system controller conor.dooley
2020-12-23 16:32 ` [PATCH v3 1/5] mbox: add polarfire soc system controller mailbox conor.dooley
2021-01-02 13:01   ` Jonathan Neuschäfer
2021-01-21 12:46     ` Conor.Dooley
2021-01-21 13:38       ` Jonathan Neuschäfer
2020-12-23 16:33 ` [PATCH v3 2/5] dt-bindings: add bindings for polarfire soc mailbox conor.dooley
2020-12-31 18:34   ` Rob Herring
2021-01-02 11:30   ` Jonathan Neuschäfer
2020-12-23 16:33 ` [PATCH v3 4/5] dt-bindings: add bindings for polarfire soc system controller conor.dooley
2021-01-05 21:25   ` Jonathan Neuschäfer
2021-01-08  2:31   ` Rob Herring [this message]
2021-01-06 19:25 ` [PATCH v3 0/5] Add support for the PolarFire SoC " Atish Patra
2021-01-07 11:49   ` Cyril.Jean

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