From: Rob Herring <robh@kernel.org>
To: Kishon Vijay Abraham I <kishon@ti.com>
Cc: Vinod Koul <vkoul@kernel.org>, Nishanth Menon <nm@ti.com>,
Swapnil Jakhade <sjakhade@cadence.com>,
Peter Rosin <peda@axentia.se>,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 2/7] dt-bindings: phy: ti,phy-j721e-wiz: Add binding for phy_en_refclk
Date: Thu, 7 Jan 2021 19:59:43 -0700 [thread overview]
Message-ID: <20210108025943.GA1790601@robh.at.kernel.org> (raw)
In-Reply-To: <20201224114250.1083-3-kishon@ti.com>
On Thu, Dec 24, 2020 at 05:12:45PM +0530, Kishon Vijay Abraham I wrote:
> Add DT binding for phy_en_refclk used to route the refclk out of the
> SERDES.
>
> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
> ---
> .../devicetree/bindings/phy/ti,phy-j721e-wiz.yaml | 13 +++++++++++++
> 1 file changed, 13 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/phy/ti,phy-j721e-wiz.yaml b/Documentation/devicetree/bindings/phy/ti,phy-j721e-wiz.yaml
> index 4a1f9c27b5f0..14823588bc94 100644
> --- a/Documentation/devicetree/bindings/phy/ti,phy-j721e-wiz.yaml
> +++ b/Documentation/devicetree/bindings/phy/ti,phy-j721e-wiz.yaml
> @@ -149,6 +149,19 @@ patternProperties:
> - assigned-clocks
> - assigned-clock-parents
>
> + "^phy-en-refclk$":
Not really a pattern. Move to 'properties'.
> + type: object
> + description: |
> + In order to drive the refclk out from the SERDES (Cadence Torrent),
> + PHY_EN_REFCLK should be set in SERDES_RST of WIZ. Model phy-en-refclk
> + as a clock so that it can be enabled directly or as a parent clock.
> + properties:
> + "#clock-cells":
> + const: 0
> +
> + required:
> + - "#clock-cells"
Though not really any need for a child node here. Just add
'#clock-cells' to the parent node.
> +
> "^serdes@[0-9a-f]+$":
> type: object
> description: |
> --
> 2.17.1
>
next prev parent reply other threads:[~2021-01-08 3:00 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-12-24 11:42 [PATCH 0/7] AM64: Add SERDES bindings and driver support Kishon Vijay Abraham I
2020-12-24 11:42 ` [PATCH 1/7] dt-bindings: phy: ti,phy-j721e-wiz: Add bindings for AM64 SERDES Wrapper Kishon Vijay Abraham I
2021-01-08 2:58 ` Rob Herring
2020-12-24 11:42 ` [PATCH 2/7] dt-bindings: phy: ti,phy-j721e-wiz: Add binding for phy_en_refclk Kishon Vijay Abraham I
2021-01-08 2:59 ` Rob Herring [this message]
2020-12-24 11:42 ` [PATCH 3/7] dt-bindings: phy: cadence-torrent: Add binding for refclk driver Kishon Vijay Abraham I
2021-01-08 3:01 ` Rob Herring
2020-12-24 11:42 ` [PATCH 4/7] dt-bindings: ti-serdes-mux: Add defines for AM64 SoC Kishon Vijay Abraham I
2021-01-08 3:03 ` Rob Herring
2021-01-08 11:01 ` Kishon Vijay Abraham I
2021-01-08 10:46 ` Peter Rosin
2021-01-08 11:03 ` Kishon Vijay Abraham I
2020-12-24 11:42 ` [PATCH 5/7] phy: ti: j721e-wiz: Configure full rate divider for AM64 Kishon Vijay Abraham I
2021-01-13 14:04 ` Vinod Koul
2020-12-24 11:42 ` [PATCH 6/7] phy: ti: j721e-wiz: Enable reference clock output in cmn_refclk_<p/m> Kishon Vijay Abraham I
2021-01-13 14:12 ` Vinod Koul
2020-12-24 11:42 ` [PATCH 7/7] phy: cadence-torrent: Add support to drive refclk out Kishon Vijay Abraham I
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