From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-17.8 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_SANE_1 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5C597C433DB for ; Sun, 10 Jan 2021 12:47:33 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 0EDD422D75 for ; Sun, 10 Jan 2021 12:47:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726281AbhAJMrR (ORCPT ); Sun, 10 Jan 2021 07:47:17 -0500 Received: from mail.kernel.org ([198.145.29.99]:55388 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726267AbhAJMrQ (ORCPT ); Sun, 10 Jan 2021 07:47:16 -0500 Received: by mail.kernel.org (Postfix) with ESMTPSA id 3606122D75; Sun, 10 Jan 2021 12:46:33 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1610282795; bh=ojFfiqYWu4ZeUxsxB2S5tHsWT12OD2vCODDjdqUYBE4=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=qBWlKr/8ApkTGYv7N3QIV7dataShT0y/OopKRrMaupSt9P9b36cnmWQNSubeZGyy0 72jmHDZUzAICkD/Vd7swlOfu9CYwpsEgtTexow811b2qN4zSVZcXaIRZw2gkOX1JNp iPkpiww7NMa/pu6//Tbeg0bDVMgc32oUVS22h8FeL/SQcpBz/zw6+d3XA8Y6811lPE p+L9WhxVcXaBEv/fq0aj3Jff4GDDEi3Zsp7CgiJrUzGE8D/wPKkLLkkFKG9bgivY6l x5yjsyEM+PAod/85/Jefkhid8nv330H7RoP0OSfyd7yGA3nXLI4LeSz91/gNiqfhJu dZqOUk/C+a1QQ== Date: Sun, 10 Jan 2021 20:46:29 +0800 From: Shawn Guo To: Guido =?iso-8859-1?Q?G=FCnther?= Cc: Rob Herring , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , Peng Fan , Dong Aisheng , Anson Huang , Krzysztof Kozlowski , Shengjiu Wang , Philipp Zabel , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH] arm64: dts: imx8mq: Add clock parents for mipi dphy Message-ID: <20210110124629.GO28365@dragon> References: MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: User-Agent: Mutt/1.9.4 (2018-02-28) Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On Fri, Dec 18, 2020 at 06:50:05PM +0100, Guido Günther wrote: > This makes sure the clock tree setup for the dphy is not dependent on > other components. > > Without this change bringing up the display can fail like > > kernel: phy phy-30a00300.dphy.2: Invalid CM/CN/CO values: 165/217/1 > kernel: phy phy-30a00300.dphy.2: for hs_clk/ref_clk=451656000/593999998 ~ 165/217 > > if LCDIF doesn't set up that part of the clock tree first. This was > noticed when testing the Librem 5 devkit with defconfig. It doesn't > happen when modules are built in. > > Signed-off-by: Guido Günther > --- > arch/arm64/boot/dts/freescale/imx8mq.dtsi | 11 ++++++++--- > 1 file changed, 8 insertions(+), 3 deletions(-) > > diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi > index a841a023e8e0..ca0847e8f13c 100644 > --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi > +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi > @@ -1016,9 +1016,14 @@ dphy: dphy@30a00300 { > reg = <0x30a00300 0x100>; > clocks = <&clk IMX8MQ_CLK_DSI_PHY_REF>; > clock-names = "phy_ref"; > - assigned-clocks = <&clk IMX8MQ_CLK_DSI_PHY_REF>; > - assigned-clock-parents = <&clk IMX8MQ_VIDEO_PLL1_OUT>; > - assigned-clock-rates = <24000000>; > + assigned-clocks = <&clk IMX8MQ_VIDEO_PLL1_REF_SEL>, > + <&clk IMX8MQ_VIDEO_PLL1_BYPASS>, > + <&clk IMX8MQ_CLK_DSI_PHY_REF>, > + <&clk IMX8MQ_VIDEO_PLL1>; You do not seem to set parent or rate on IMX8MQ_VIDEO_PLL1. Why do you have it here? Shawn > + assigned-clock-parents = <&clk IMX8MQ_CLK_25M>, > + <&clk IMX8MQ_VIDEO_PLL1>, > + <&clk IMX8MQ_VIDEO_PLL1_OUT>; > + assigned-clock-rates = <0>, <0>, <24000000>; > #phy-cells = <0>; > power-domains = <&pgc_mipi>; > status = "disabled"; > -- > 2.29.2 >