From: Joakim Zhang <qiangqing.zhang@nxp.com>
To: shawnguo@kernel.org, s.hauer@pengutronix.de, festevam@gmail.com
Cc: devicetree@vger.kernel.org, linux-imx@nxp.com
Subject: [PATCH V2 4/5] arm64: dts: imx8m: add mac address for FEC
Date: Sat, 16 Jan 2021 16:44:30 +0800 [thread overview]
Message-ID: <20210116084431.25851-5-qiangqing.zhang@nxp.com> (raw)
In-Reply-To: <20210116084431.25851-1-qiangqing.zhang@nxp.com>
Add mac address in efuse, so that FEC driver can parse it from nvmem
cell.
Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
---
arch/arm64/boot/dts/freescale/imx8mm.dtsi | 7 +++++++
arch/arm64/boot/dts/freescale/imx8mn.dtsi | 7 +++++++
arch/arm64/boot/dts/freescale/imx8mp.dtsi | 7 +++++++
arch/arm64/boot/dts/freescale/imx8mq.dtsi | 7 +++++++
4 files changed, 28 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
index 5af0e63b1db1..acb8df609e2b 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
@@ -527,6 +527,10 @@
cpu_speed_grade: speed-grade@10 {
reg = <0x10 4>;
};
+
+ fec_mac_address: mac-address@90 {
+ reg = <0x90 6>;
+ };
};
anatop: anatop@30360000 {
@@ -923,6 +927,9 @@
assigned-clock-rates = <0>, <100000000>, <125000000>, <0>;
fsl,num-tx-queues = <3>;
fsl,num-rx-queues = <3>;
+ nvmem-cells = <&fec_mac_address>;
+ nvmem-cell-names = "mac-address";
+ nvmem_macaddr_swap;
status = "disabled";
};
diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
index 9dc52747a142..30cc51b633cf 100644
--- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
@@ -540,6 +540,10 @@
cpu_speed_grade: speed-grade@10 {
reg = <0x10 4>;
};
+
+ fec_mac_address: mac-address@90 {
+ reg = <0x90 6>;
+ };
};
anatop: anatop@30360000 {
@@ -921,6 +925,9 @@
assigned-clock-rates = <0>, <100000000>, <125000000>, <0>;
fsl,num-tx-queues = <3>;
fsl,num-rx-queues = <3>;
+ nvmem-cells = <&fec_mac_address>;
+ nvmem-cell-names = "mac-address";
+ nvmem_macaddr_swap;
status = "disabled";
};
diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
index ba32725ff28c..9dc63eddce16 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
@@ -337,6 +337,10 @@
cpu_speed_grade: speed-grade@10 {
reg = <0x10 4>;
};
+
+ eth_mac1: mac-address@90 {
+ reg = <0x90 6>;
+ };
};
anatop: anatop@30360000 {
@@ -776,6 +780,9 @@
assigned-clock-rates = <0>, <100000000>, <125000000>, <0>;
fsl,num-tx-queues = <3>;
fsl,num-rx-queues = <3>;
+ nvmem-cells = <ð_mac1>;
+ nvmem-cell-names = "mac-address";
+ nvmem_macaddr_swap;
status = "disabled";
};
};
diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
index 2f64a868e01e..48265f5b2728 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
@@ -564,6 +564,10 @@
cpu_speed_grade: speed-grade@10 {
reg = <0x10 4>;
};
+
+ fec_mac_address: mac-address@90 {
+ reg = <0x90 6>;
+ };
};
anatop: syscon@30360000 {
@@ -1174,6 +1178,9 @@
assigned-clock-rates = <0>, <100000000>, <125000000>, <0>;
fsl,num-tx-queues = <3>;
fsl,num-rx-queues = <3>;
+ nvmem-cells = <&fec_mac_address>;
+ nvmem-cell-names = "mac-address";
+ nvmem_macaddr_swap;
status = "disabled";
};
};
--
2.17.1
next prev parent reply other threads:[~2021-01-16 8:46 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-01-16 8:44 [PATCH V2 0/5] patches for FEC Joakim Zhang
2021-01-16 8:44 ` [PATCH V2 1/5] ARM: dts: imx6: add wakeup support via magic packet Joakim Zhang
2021-01-16 8:44 ` [PATCH V2 2/5] arm64: dts: imx8m: correct assigned clocks for FEC Joakim Zhang
2021-01-16 8:44 ` [PATCH V2 3/5] arm64: dts: imx8mq: assign clock parents " Joakim Zhang
2021-01-16 8:44 ` Joakim Zhang [this message]
2021-01-16 8:44 ` [PATCH V2 5/5] arm64: dts: imx8m: add fsl,stop-mode property " Joakim Zhang
2021-01-18 9:40 ` [PATCH V2 0/5] patches " Shawn Guo
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