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Date:   Wed, 27 Jan 2021 21:03:07 +0530
From:   Vinod Koul <vkoul@kernel.org>
To:     Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Cc:     Bjorn Andersson <bjorn.andersson@linaro.org>,
        linux-arm-msm@vger.kernel.org, Andy Gross <agross@kernel.org>,
        Rob Herring <robh+dt@kernel.org>, devicetree@vger.kernel.org,
        linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 5/6] arm64: dts: qcom: Add basic devicetree support
 for SM8350 SoC
Message-ID: <20210127153307.GC2771@vkoul-mobl>
References: <20210127123054.263231-1-vkoul@kernel.org>
 <20210127123054.263231-6-vkoul@kernel.org>
 <194d2ebe26a9420f842c97738adb0443@codeaurora.org>
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Hi Sai,

On 27-01-21, 18:37, Sai Prakash Ranjan wrote:
> Hi Vinod,
> 
> On 2021-01-27 18:00, Vinod Koul wrote:

> > +	timer {
> > +		compatible = "arm,armv8-timer";
> > +		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) |
> > IRQ_TYPE_LEVEL_LOW)>,
> > +			     <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
> > +			     <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
> > +			     <GIC_PPI 12 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;
> 
> The last interrupt should be hypervisor physical interrupt(10) not 12(hyp
> virtual).
> It works currently with android bootloaders because the host linux kernel
> will run
> at EL1 and will use EL1 physical timer interrupt(14), but if we ever have
> the host
> kernel run in EL2(for example, chrome) then we will not receive any timer
> interrupts.

I got these values from downstream and used them as is. I will update
and also check documentation. Thanks for pointing out

-- 
~Vinod