* [PATCH v3 04/34] dt-bindings: Add bindings for Keem Bay IPC driver
[not found] <20210126054036.61587-1-mgross@linux.intel.com>
@ 2021-01-26 5:40 ` mgross
2021-01-26 5:40 ` [PATCH v3 06/34] dt-bindings: Add bindings for Keem Bay VPU " mgross
` (2 subsequent siblings)
3 siblings, 0 replies; 9+ messages in thread
From: mgross @ 2021-01-26 5:40 UTC (permalink / raw)
To: markgross, mgross, arnd, bp, damien.lemoal, dragan.cvetic, gregkh,
corbet, palmerdabbelt, paul.walmsley, peng.fan, robh+dt, shawnguo,
jassisinghbrar
Cc: linux-kernel, Daniele Alessandrelli, devicetree
From: Daniele Alessandrelli <daniele.alessandrelli@intel.com>
Add DT binding documentation for the Intel Keem Bay IPC driver, which
enables communication between the Computing Sub-System (CSS) and the
Multimedia Sub-System (MSS) of the Intel Movidius SoC code named Keem
Bay.
Cc: Rob Herring <robh+dt@kernel.org>
Cc: devicetree@vger.kernel.org
Reviewed-by: Mark Gross <mgross@linux.intel.com>
Signed-off-by: Daniele Alessandrelli <daniele.alessandrelli@intel.com>
---
.../bindings/soc/intel/intel,keembay-ipc.yaml | 45 +++++++++++++++++++
1 file changed, 45 insertions(+)
create mode 100644 Documentation/devicetree/bindings/soc/intel/intel,keembay-ipc.yaml
diff --git a/Documentation/devicetree/bindings/soc/intel/intel,keembay-ipc.yaml b/Documentation/devicetree/bindings/soc/intel/intel,keembay-ipc.yaml
new file mode 100644
index 000000000000..586fe73f4cd4
--- /dev/null
+++ b/Documentation/devicetree/bindings/soc/intel/intel,keembay-ipc.yaml
@@ -0,0 +1,45 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+# Copyright (C) 2020 Intel Corporation
+%YAML 1.2
+---
+$id: "http://devicetree.org/schemas/soc/intel/intel,keembay-ipc.yaml#"
+$schema: "http://devicetree.org/meta-schemas/core.yaml#"
+
+title: Keem Bay IPC
+
+maintainers:
+ - Daniele Alessandrelli <daniele.alessandrelli@intel.com>
+
+description:
+ The Keem Bay IPC driver enables Inter-Processor Communication (IPC) with the
+ Visual Processor Unit (VPU) embedded in the Intel Movidius SoC code named
+ Keem Bay.
+
+properties:
+ compatible:
+ const: intel,keembay-ipc
+
+ memory-region:
+ items:
+ - description:
+ Reserved memory region used by the CPU to allocate IPC packets.
+ - description:
+ Reserved memory region used by the VPU to allocate IPC packets.
+
+ mboxes:
+ description: VPU IPC Mailbox.
+
+required:
+ - compatible
+ - memory-region
+ - mboxes
+
+additionalProperties: false
+
+examples:
+ - |
+ ipc {
+ compatible = "intel,keembay-ipc";
+ memory-region = <&ipc_cpu_reserved>, <&ipc_vpu_reserved>;
+ mboxes = <&vpu_ipc_mbox 0>;
+ };
--
2.17.1
^ permalink raw reply related [flat|nested] 9+ messages in thread* [PATCH v3 06/34] dt-bindings: Add bindings for Keem Bay VPU IPC driver
[not found] <20210126054036.61587-1-mgross@linux.intel.com>
2021-01-26 5:40 ` [PATCH v3 04/34] dt-bindings: Add bindings for Keem Bay IPC driver mgross
@ 2021-01-26 5:40 ` mgross
2021-01-27 14:00 ` Rob Herring
2021-01-26 5:40 ` [PATCH v3 17/34] xlink-ipc: Add xlink ipc device tree bindings mgross
2021-01-26 5:40 ` [PATCH v3 19/34] xlink-core: Add xlink core " mgross
3 siblings, 1 reply; 9+ messages in thread
From: mgross @ 2021-01-26 5:40 UTC (permalink / raw)
To: markgross, mgross, arnd, bp, damien.lemoal, dragan.cvetic, gregkh,
corbet, palmerdabbelt, paul.walmsley, peng.fan, robh+dt, shawnguo,
jassisinghbrar
Cc: linux-kernel, Paul Murphy, devicetree, Daniele Alessandrelli
From: Paul Murphy <paul.j.murphy@intel.com>
Add DT bindings documentation for the Keem Bay VPU IPC driver.
Cc: Rob Herring <robh+dt@kernel.org>
Cc: devicetree@vger.kernel.org
Reviewed-by: Mark Gross <mgross@linux.intel.com>
Signed-off-by: Paul Murphy <paul.j.murphy@intel.com>
Co-developed-by: Daniele Alessandrelli <daniele.alessandrelli@intel.com>
Signed-off-by: Daniele Alessandrelli <daniele.alessandrelli@intel.com>
---
.../soc/intel/intel,keembay-vpu-ipc.yaml | 153 ++++++++++++++++++
1 file changed, 153 insertions(+)
create mode 100644 Documentation/devicetree/bindings/soc/intel/intel,keembay-vpu-ipc.yaml
diff --git a/Documentation/devicetree/bindings/soc/intel/intel,keembay-vpu-ipc.yaml b/Documentation/devicetree/bindings/soc/intel/intel,keembay-vpu-ipc.yaml
new file mode 100644
index 000000000000..cd1c4abe8bc9
--- /dev/null
+++ b/Documentation/devicetree/bindings/soc/intel/intel,keembay-vpu-ipc.yaml
@@ -0,0 +1,153 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+# Copyright (c) Intel Corporation. All rights reserved.
+%YAML 1.2
+---
+$id: "http://devicetree.org/schemas/soc/intel/intel,keembay-vpu-ipc.yaml#"
+$schema: "http://devicetree.org/meta-schemas/core.yaml#"
+
+title: Intel Keem Bay VPU IPC
+
+maintainers:
+ - Paul Murphy <paul.j.murphy@intel.com>
+
+description:
+ The VPU IPC driver facilitates loading of firmware, control, and communication
+ with the VPU over the IPC FIFO in the Intel Keem Bay SoC.
+
+properties:
+ compatible:
+ oneOf:
+ - items:
+ - const: intel,keembay-vpu-ipc
+
+ reg:
+ items:
+ - description: NCE WDT registers
+ - description: NCE TIM_GEN_CONFIG registers
+ - description: MSS WDT registers
+ - description: MSS TIM_GEN_CONFIG registers
+
+ reg-names:
+ items:
+ - const: nce_wdt
+ - const: nce_tim_cfg
+ - const: mss_wdt
+ - const: mss_tim_cfg
+
+ memory-region:
+ items:
+ - description: reference to the VPU reserved memory region
+ - description: reference to the X509 reserved memory region
+ - description: reference to the MSS IPC area
+
+ clocks:
+ items:
+ - description: cpu clock
+ - description: pll 0 out 0 rate
+ - description: pll 0 out 1 rate
+ - description: pll 0 out 2 rate
+ - description: pll 0 out 3 rate
+ - description: pll 1 out 0 rate
+ - description: pll 1 out 1 rate
+ - description: pll 1 out 2 rate
+ - description: pll 1 out 3 rate
+ - description: pll 2 out 0 rate
+ - description: pll 2 out 1 rate
+ - description: pll 2 out 2 rate
+ - description: pll 2 out 3 rate
+
+ clock-names:
+ items:
+ - const: cpu_clock
+ - const: pll_0_out_0
+ - const: pll_0_out_1
+ - const: pll_0_out_2
+ - const: pll_0_out_3
+ - const: pll_1_out_0
+ - const: pll_1_out_1
+ - const: pll_1_out_2
+ - const: pll_1_out_3
+ - const: pll_2_out_0
+ - const: pll_2_out_1
+ - const: pll_2_out_2
+ - const: pll_2_out_3
+
+ interrupts:
+ items:
+ - description: number of NCE sub-system WDT timeout IRQ
+ - description: number of MSS sub-system WDT timeout IRQ
+
+ interrupt-names:
+ items:
+ - const: nce_wdt
+ - const: mss_wdt
+
+ intel,keembay-vpu-ipc-nce-wdt-redirect:
+ $ref: "/schemas/types.yaml#/definitions/uint32"
+ description:
+ Number to which we will request that the NCE sub-system
+ re-directs it's WDT timeout IRQ
+
+ intel,keembay-vpu-ipc-mss-wdt-redirect:
+ $ref: "/schemas/types.yaml#/definitions/uint32"
+ description:
+ Number to which we will request that the MSS sub-system
+ re-directs it's WDT timeout IRQ
+
+ intel,keembay-vpu-ipc-imr:
+ $ref: "/schemas/types.yaml#/definitions/uint32"
+ description:
+ IMR (isolated memory region) number which we will request
+ the runtime service uses to protect the VPU memory region
+ before authentication
+
+ intel,keembay-vpu-ipc-id:
+ $ref: "/schemas/types.yaml#/definitions/uint32"
+ description: The VPU ID to be passed to the VPU firmware.
+
+additionalProperties: False
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ vpu-ipc@3f00209c {
+ compatible = "intel,keembay-vpu-ipc";
+ reg = <0x3f00209c 0x10>,
+ <0x3f003008 0x4>,
+ <0x2082009c 0x10>,
+ <0x20821008 0x4>;
+ reg-names = "nce_wdt",
+ "nce_tim_cfg",
+ "mss_wdt",
+ "mss_tim_cfg";
+ memory-region = <&vpu_reserved>,
+ <&vpu_x509_reserved>,
+ <&mss_ipc_reserved>;
+ clocks = <&scmi_clk 0>,
+ <&scmi_clk 0>,
+ <&scmi_clk 1>,
+ <&scmi_clk 2>,
+ <&scmi_clk 3>,
+ <&scmi_clk 4>,
+ <&scmi_clk 5>,
+ <&scmi_clk 6>,
+ <&scmi_clk 7>,
+ <&scmi_clk 8>,
+ <&scmi_clk 9>,
+ <&scmi_clk 10>,
+ <&scmi_clk 11>;
+ clock-names = "cpu_clock",
+ "pll_0_out_0", "pll_0_out_1",
+ "pll_0_out_2", "pll_0_out_3",
+ "pll_1_out_0", "pll_1_out_1",
+ "pll_1_out_2", "pll_1_out_3",
+ "pll_2_out_0", "pll_2_out_1",
+ "pll_2_out_2", "pll_2_out_3";
+ interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "nce_wdt", "mss_wdt";
+ intel,keembay-vpu-ipc-nce-wdt-redirect = <63>;
+ intel,keembay-vpu-ipc-mss-wdt-redirect = <47>;
+ intel,keembay-vpu-ipc-imr = <9>;
+ intel,keembay-vpu-ipc-id = <0>;
+ };
--
2.17.1
^ permalink raw reply related [flat|nested] 9+ messages in thread* Re: [PATCH v3 06/34] dt-bindings: Add bindings for Keem Bay VPU IPC driver
2021-01-26 5:40 ` [PATCH v3 06/34] dt-bindings: Add bindings for Keem Bay VPU " mgross
@ 2021-01-27 14:00 ` Rob Herring
2021-01-30 2:02 ` mark gross
0 siblings, 1 reply; 9+ messages in thread
From: Rob Herring @ 2021-01-27 14:00 UTC (permalink / raw)
To: mgross
Cc: jassisinghbrar, palmerdabbelt, dragan.cvetic, devicetree, arnd,
paul.walmsley, robh+dt, Daniele Alessandrelli, gregkh, markgross,
corbet, damien.lemoal, Paul Murphy, bp, peng.fan, shawnguo,
linux-kernel
On Mon, 25 Jan 2021 21:40:08 -0800, mgross@linux.intel.com wrote:
> From: Paul Murphy <paul.j.murphy@intel.com>
>
> Add DT bindings documentation for the Keem Bay VPU IPC driver.
>
> Cc: Rob Herring <robh+dt@kernel.org>
> Cc: devicetree@vger.kernel.org
> Reviewed-by: Mark Gross <mgross@linux.intel.com>
> Signed-off-by: Paul Murphy <paul.j.murphy@intel.com>
> Co-developed-by: Daniele Alessandrelli <daniele.alessandrelli@intel.com>
> Signed-off-by: Daniele Alessandrelli <daniele.alessandrelli@intel.com>
> ---
> .../soc/intel/intel,keembay-vpu-ipc.yaml | 153 ++++++++++++++++++
> 1 file changed, 153 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/soc/intel/intel,keembay-vpu-ipc.yaml
>
My bot found errors running 'make dt_binding_check' on your patch:
yamllint warnings/errors:
./Documentation/devicetree/bindings/soc/intel/intel,keembay-vpu-ipc.yaml:21:9: [warning] wrong indentation: expected 10 but found 8 (indentation)
dtschema/dtc warnings/errors:
See https://patchwork.ozlabs.org/patch/1432168
This check can fail if there are any dependencies. The base for a patch
series is generally the most recent rc1.
If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:
pip3 install dtschema --upgrade
Please check and re-submit.
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH v3 06/34] dt-bindings: Add bindings for Keem Bay VPU IPC driver
2021-01-27 14:00 ` Rob Herring
@ 2021-01-30 2:02 ` mark gross
0 siblings, 0 replies; 9+ messages in thread
From: mark gross @ 2021-01-30 2:02 UTC (permalink / raw)
To: Rob Herring
Cc: mgross, jassisinghbrar, palmerdabbelt, dragan.cvetic, devicetree,
arnd, paul.walmsley, robh+dt, Daniele Alessandrelli, gregkh,
markgross, corbet, damien.lemoal, Paul Murphy, bp, peng.fan,
shawnguo, linux-kernel
On Wed, Jan 27, 2021 at 08:00:11AM -0600, Rob Herring wrote:
> On Mon, 25 Jan 2021 21:40:08 -0800, mgross@linux.intel.com wrote:
> > From: Paul Murphy <paul.j.murphy@intel.com>
> >
> > Add DT bindings documentation for the Keem Bay VPU IPC driver.
> >
> > Cc: Rob Herring <robh+dt@kernel.org>
> > Cc: devicetree@vger.kernel.org
> > Reviewed-by: Mark Gross <mgross@linux.intel.com>
> > Signed-off-by: Paul Murphy <paul.j.murphy@intel.com>
> > Co-developed-by: Daniele Alessandrelli <daniele.alessandrelli@intel.com>
> > Signed-off-by: Daniele Alessandrelli <daniele.alessandrelli@intel.com>
> > ---
> > .../soc/intel/intel,keembay-vpu-ipc.yaml | 153 ++++++++++++++++++
> > 1 file changed, 153 insertions(+)
> > create mode 100644 Documentation/devicetree/bindings/soc/intel/intel,keembay-vpu-ipc.yaml
> >
>
> My bot found errors running 'make dt_binding_check' on your patch:
>
> yamllint warnings/errors:
> ./Documentation/devicetree/bindings/soc/intel/intel,keembay-vpu-ipc.yaml:21:9: [warning] wrong indentation: expected 10 but found 8 (indentation)
>
> dtschema/dtc warnings/errors:
fixed.
>
> See https://patchwork.ozlabs.org/patch/1432168
>
> This check can fail if there are any dependencies. The base for a patch
> series is generally the most recent rc1.
>
> If you already ran 'make dt_binding_check' and didn't see the above
> error(s), then make sure 'yamllint' is installed and dt-schema is up to
> date:
>
> pip3 install dtschema --upgrade
>
> Please check and re-submit.
>
^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH v3 17/34] xlink-ipc: Add xlink ipc device tree bindings
[not found] <20210126054036.61587-1-mgross@linux.intel.com>
2021-01-26 5:40 ` [PATCH v3 04/34] dt-bindings: Add bindings for Keem Bay IPC driver mgross
2021-01-26 5:40 ` [PATCH v3 06/34] dt-bindings: Add bindings for Keem Bay VPU " mgross
@ 2021-01-26 5:40 ` mgross
2021-01-27 14:00 ` Rob Herring
2021-01-26 5:40 ` [PATCH v3 19/34] xlink-core: Add xlink core " mgross
3 siblings, 1 reply; 9+ messages in thread
From: mgross @ 2021-01-26 5:40 UTC (permalink / raw)
To: markgross, mgross, arnd, bp, damien.lemoal, dragan.cvetic, gregkh,
corbet, palmerdabbelt, paul.walmsley, peng.fan, robh+dt, shawnguo,
jassisinghbrar
Cc: linux-kernel, Seamus Kelly, devicetree, Ryan Carnaghi
From: Seamus Kelly <seamus.kelly@intel.com>
Add device tree bindings for the xLink IPC driver which enables xLink to
control and communicate with the VPU IP present on the Intel Keem Bay
SoC.
Cc: Rob Herring <robh+dt@kernel.org>
Cc: devicetree@vger.kernel.org
Reviewed-by: Mark Gross <mgross@linux.intel.com>
Signed-off-by: Seamus Kelly <seamus.kelly@intel.com>
Signed-off-by: Ryan Carnaghi <ryan.r.carnaghi@intel.com>
---
.../misc/intel,keembay-xlink-ipc.yaml | 49 +++++++++++++++++++
1 file changed, 49 insertions(+)
create mode 100644 Documentation/devicetree/bindings/misc/intel,keembay-xlink-ipc.yaml
diff --git a/Documentation/devicetree/bindings/misc/intel,keembay-xlink-ipc.yaml b/Documentation/devicetree/bindings/misc/intel,keembay-xlink-ipc.yaml
new file mode 100644
index 000000000000..699e43c4cd40
--- /dev/null
+++ b/Documentation/devicetree/bindings/misc/intel,keembay-xlink-ipc.yaml
@@ -0,0 +1,49 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+# Copyright (c) Intel Corporation. All rights reserved.
+%YAML 1.2
+---
+$id: "http://devicetree.org/schemas/misc/intel,keembay-xlink-ipc.yaml#"
+$schema: "http://devicetree.org/meta-schemas/core.yaml#"
+
+title: Intel Keem Bay xlink IPC
+
+maintainers:
+ - Kelly Seamus <seamus.kelly@intel.com>
+
+description: |
+ The Keem Bay xlink IPC driver enables the communication/control sub-system
+ for internal IPC communications within the Intel Keem Bay SoC.
+
+properties:
+ compatible:
+ oneOf:
+ - items:
+ - const: intel,keembay-xlink-ipc
+
+ memory-region:
+ items:
+ - description: reference to the CSS xlink IPC reserved memory region.
+ - description: reference to the MSS xlink IPC reserved memory region.
+
+ intel,keembay-vpu-ipc-id:
+ $ref: "/schemas/types.yaml#/definitions/uint32"
+ description: The numeric ID identifying the VPU within the xLink stack.
+
+ intel,keembay-vpu-ipc-name:
+ $ref: "/schemas/types.yaml#/definitions/string"
+ description: User-friendly name for the VPU within the xLink stack.
+
+ intel,keembay-vpu-ipc:
+ $ref: "/schemas/types.yaml#/definitions/phandle"
+ description: reference to the corresponding intel,keembay-vpu-ipc node.
+
+examples:
+ - |
+ xlink-ipc {
+ compatible = "intel,keembay-xlink-ipc";
+ memory-region = <&css_xlink_reserved>,
+ <&mss_xlink_reserved>;
+ intel,keembay-vpu-ipc-id = <0x0>;
+ intel,keembay-vpu-ipc-name = "vpu-slice-0";
+ intel,keembay-vpu-ipc = <&vpuipc>;
+ };
--
2.17.1
^ permalink raw reply related [flat|nested] 9+ messages in thread* Re: [PATCH v3 17/34] xlink-ipc: Add xlink ipc device tree bindings
2021-01-26 5:40 ` [PATCH v3 17/34] xlink-ipc: Add xlink ipc device tree bindings mgross
@ 2021-01-27 14:00 ` Rob Herring
0 siblings, 0 replies; 9+ messages in thread
From: Rob Herring @ 2021-01-27 14:00 UTC (permalink / raw)
To: mgross
Cc: bp, damien.lemoal, shawnguo, Seamus Kelly, jassisinghbrar,
markgross, Ryan Carnaghi, devicetree, paul.walmsley, arnd,
linux-kernel, corbet, peng.fan, robh+dt, dragan.cvetic, gregkh,
palmerdabbelt
On Mon, 25 Jan 2021 21:40:19 -0800, mgross@linux.intel.com wrote:
> From: Seamus Kelly <seamus.kelly@intel.com>
>
> Add device tree bindings for the xLink IPC driver which enables xLink to
> control and communicate with the VPU IP present on the Intel Keem Bay
> SoC.
>
> Cc: Rob Herring <robh+dt@kernel.org>
> Cc: devicetree@vger.kernel.org
> Reviewed-by: Mark Gross <mgross@linux.intel.com>
> Signed-off-by: Seamus Kelly <seamus.kelly@intel.com>
> Signed-off-by: Ryan Carnaghi <ryan.r.carnaghi@intel.com>
> ---
> .../misc/intel,keembay-xlink-ipc.yaml | 49 +++++++++++++++++++
> 1 file changed, 49 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/misc/intel,keembay-xlink-ipc.yaml
>
My bot found errors running 'make dt_binding_check' on your patch:
yamllint warnings/errors:
./Documentation/devicetree/bindings/misc/intel,keembay-xlink-ipc.yaml:21:9: [warning] wrong indentation: expected 10 but found 8 (indentation)
dtschema/dtc warnings/errors:
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/misc/intel,keembay-xlink-ipc.yaml: 'additionalProperties' is a required property
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/misc/intel,keembay-xlink-ipc.yaml: ignoring, error in schema:
warning: no schema found in file: ./Documentation/devicetree/bindings/misc/intel,keembay-xlink-ipc.yaml
See https://patchwork.ozlabs.org/patch/1432167
This check can fail if there are any dependencies. The base for a patch
series is generally the most recent rc1.
If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:
pip3 install dtschema --upgrade
Please check and re-submit.
^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH v3 19/34] xlink-core: Add xlink core device tree bindings
[not found] <20210126054036.61587-1-mgross@linux.intel.com>
` (2 preceding siblings ...)
2021-01-26 5:40 ` [PATCH v3 17/34] xlink-ipc: Add xlink ipc device tree bindings mgross
@ 2021-01-26 5:40 ` mgross
2021-01-27 14:00 ` Rob Herring
3 siblings, 1 reply; 9+ messages in thread
From: mgross @ 2021-01-26 5:40 UTC (permalink / raw)
To: markgross, mgross, arnd, bp, damien.lemoal, dragan.cvetic, gregkh,
corbet, palmerdabbelt, paul.walmsley, peng.fan, robh+dt, shawnguo,
jassisinghbrar
Cc: linux-kernel, Seamus Kelly, devicetree, Ryan Carnaghi
From: Seamus Kelly <seamus.kelly@intel.com>
Add device tree bindings for keembay-xlink.
Cc: Rob Herring <robh+dt@kernel.org>
Cc: devicetree@vger.kernel.org
Reviewed-by: Mark Gross <mgross@linux.intel.com>
Signed-off-by: Seamus Kelly <seamus.kelly@intel.com>
Signed-off-by: Ryan Carnaghi <ryan.r.carnaghi@intel.com>
---
.../bindings/misc/intel,keembay-xlink.yaml | 27 +++++++++++++++++++
1 file changed, 27 insertions(+)
create mode 100644 Documentation/devicetree/bindings/misc/intel,keembay-xlink.yaml
diff --git a/Documentation/devicetree/bindings/misc/intel,keembay-xlink.yaml b/Documentation/devicetree/bindings/misc/intel,keembay-xlink.yaml
new file mode 100644
index 000000000000..89c34018fa04
--- /dev/null
+++ b/Documentation/devicetree/bindings/misc/intel,keembay-xlink.yaml
@@ -0,0 +1,27 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+# Copyright (c) Intel Corporation. All rights reserved.
+%YAML 1.2
+---
+$id: "http://devicetree.org/schemas/misc/intel,keembay-xlink.yaml#"
+$schema: "http://devicetree.org/meta-schemas/core.yaml#"
+
+title: Intel Keem Bay xlink
+
+maintainers:
+ - Seamus Kelly <seamus.kelly@intel.com>
+
+description: |
+ The Keem Bay xlink driver enables the communication/control sub-system
+ for internal and external communications to the Intel Keem Bay SoC.
+
+properties:
+ compatible:
+ oneOf:
+ - items:
+ - const: intel,keembay-xlink
+
+examples:
+ - |
+ xlink {
+ compatible = "intel,keembay-xlink";
+ };
--
2.17.1
^ permalink raw reply related [flat|nested] 9+ messages in thread* Re: [PATCH v3 19/34] xlink-core: Add xlink core device tree bindings
2021-01-26 5:40 ` [PATCH v3 19/34] xlink-core: Add xlink core " mgross
@ 2021-01-27 14:00 ` Rob Herring
0 siblings, 0 replies; 9+ messages in thread
From: Rob Herring @ 2021-01-27 14:00 UTC (permalink / raw)
To: mgross
Cc: markgross, bp, shawnguo, Seamus Kelly, Ryan Carnaghi,
palmerdabbelt, gregkh, corbet, jassisinghbrar, devicetree,
linux-kernel, dragan.cvetic, peng.fan, arnd, paul.walmsley,
robh+dt, damien.lemoal
On Mon, 25 Jan 2021 21:40:21 -0800, mgross@linux.intel.com wrote:
> From: Seamus Kelly <seamus.kelly@intel.com>
>
> Add device tree bindings for keembay-xlink.
>
> Cc: Rob Herring <robh+dt@kernel.org>
> Cc: devicetree@vger.kernel.org
> Reviewed-by: Mark Gross <mgross@linux.intel.com>
> Signed-off-by: Seamus Kelly <seamus.kelly@intel.com>
> Signed-off-by: Ryan Carnaghi <ryan.r.carnaghi@intel.com>
> ---
> .../bindings/misc/intel,keembay-xlink.yaml | 27 +++++++++++++++++++
> 1 file changed, 27 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/misc/intel,keembay-xlink.yaml
>
My bot found errors running 'make dt_binding_check' on your patch:
yamllint warnings/errors:
./Documentation/devicetree/bindings/misc/intel,keembay-xlink.yaml:21:9: [warning] wrong indentation: expected 10 but found 8 (indentation)
dtschema/dtc warnings/errors:
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/misc/intel,keembay-xlink.yaml: 'additionalProperties' is a required property
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/misc/intel,keembay-xlink.yaml: ignoring, error in schema:
warning: no schema found in file: ./Documentation/devicetree/bindings/misc/intel,keembay-xlink.yaml
See https://patchwork.ozlabs.org/patch/1432165
This check can fail if there are any dependencies. The base for a patch
series is generally the most recent rc1.
If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:
pip3 install dtschema --upgrade
Please check and re-submit.
^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH v3 06/34] dt-bindings: Add bindings for Keem Bay VPU IPC driver
[not found] <20210130022124.65083-1-mgross@linux.intel.com>
@ 2021-01-30 2:20 ` mgross
0 siblings, 0 replies; 9+ messages in thread
From: mgross @ 2021-01-30 2:20 UTC (permalink / raw)
To: markgross, mgross, arnd, bp, damien.lemoal, dragan.cvetic, gregkh,
corbet, palmerdabbelt, paul.walmsley, peng.fan, robh+dt, shawnguo,
jassisinghbrar
Cc: linux-kernel, Paul Murphy, devicetree, Daniele Alessandrelli
From: Paul Murphy <paul.j.murphy@intel.com>
Add DT bindings documentation for the Keem Bay VPU IPC driver.
Cc: Rob Herring <robh+dt@kernel.org>
Cc: devicetree@vger.kernel.org
Reviewed-by: Mark Gross <mgross@linux.intel.com>
Signed-off-by: Paul Murphy <paul.j.murphy@intel.com>
Co-developed-by: Daniele Alessandrelli <daniele.alessandrelli@intel.com>
Signed-off-by: Daniele Alessandrelli <daniele.alessandrelli@intel.com>
---
.../soc/intel/intel,keembay-vpu-ipc.yaml | 153 ++++++++++++++++++
1 file changed, 153 insertions(+)
create mode 100644 Documentation/devicetree/bindings/soc/intel/intel,keembay-vpu-ipc.yaml
diff --git a/Documentation/devicetree/bindings/soc/intel/intel,keembay-vpu-ipc.yaml b/Documentation/devicetree/bindings/soc/intel/intel,keembay-vpu-ipc.yaml
new file mode 100644
index 000000000000..cd1c4abe8bc9
--- /dev/null
+++ b/Documentation/devicetree/bindings/soc/intel/intel,keembay-vpu-ipc.yaml
@@ -0,0 +1,153 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+# Copyright (c) Intel Corporation. All rights reserved.
+%YAML 1.2
+---
+$id: "http://devicetree.org/schemas/soc/intel/intel,keembay-vpu-ipc.yaml#"
+$schema: "http://devicetree.org/meta-schemas/core.yaml#"
+
+title: Intel Keem Bay VPU IPC
+
+maintainers:
+ - Paul Murphy <paul.j.murphy@intel.com>
+
+description:
+ The VPU IPC driver facilitates loading of firmware, control, and communication
+ with the VPU over the IPC FIFO in the Intel Keem Bay SoC.
+
+properties:
+ compatible:
+ oneOf:
+ - items:
+ - const: intel,keembay-vpu-ipc
+
+ reg:
+ items:
+ - description: NCE WDT registers
+ - description: NCE TIM_GEN_CONFIG registers
+ - description: MSS WDT registers
+ - description: MSS TIM_GEN_CONFIG registers
+
+ reg-names:
+ items:
+ - const: nce_wdt
+ - const: nce_tim_cfg
+ - const: mss_wdt
+ - const: mss_tim_cfg
+
+ memory-region:
+ items:
+ - description: reference to the VPU reserved memory region
+ - description: reference to the X509 reserved memory region
+ - description: reference to the MSS IPC area
+
+ clocks:
+ items:
+ - description: cpu clock
+ - description: pll 0 out 0 rate
+ - description: pll 0 out 1 rate
+ - description: pll 0 out 2 rate
+ - description: pll 0 out 3 rate
+ - description: pll 1 out 0 rate
+ - description: pll 1 out 1 rate
+ - description: pll 1 out 2 rate
+ - description: pll 1 out 3 rate
+ - description: pll 2 out 0 rate
+ - description: pll 2 out 1 rate
+ - description: pll 2 out 2 rate
+ - description: pll 2 out 3 rate
+
+ clock-names:
+ items:
+ - const: cpu_clock
+ - const: pll_0_out_0
+ - const: pll_0_out_1
+ - const: pll_0_out_2
+ - const: pll_0_out_3
+ - const: pll_1_out_0
+ - const: pll_1_out_1
+ - const: pll_1_out_2
+ - const: pll_1_out_3
+ - const: pll_2_out_0
+ - const: pll_2_out_1
+ - const: pll_2_out_2
+ - const: pll_2_out_3
+
+ interrupts:
+ items:
+ - description: number of NCE sub-system WDT timeout IRQ
+ - description: number of MSS sub-system WDT timeout IRQ
+
+ interrupt-names:
+ items:
+ - const: nce_wdt
+ - const: mss_wdt
+
+ intel,keembay-vpu-ipc-nce-wdt-redirect:
+ $ref: "/schemas/types.yaml#/definitions/uint32"
+ description:
+ Number to which we will request that the NCE sub-system
+ re-directs it's WDT timeout IRQ
+
+ intel,keembay-vpu-ipc-mss-wdt-redirect:
+ $ref: "/schemas/types.yaml#/definitions/uint32"
+ description:
+ Number to which we will request that the MSS sub-system
+ re-directs it's WDT timeout IRQ
+
+ intel,keembay-vpu-ipc-imr:
+ $ref: "/schemas/types.yaml#/definitions/uint32"
+ description:
+ IMR (isolated memory region) number which we will request
+ the runtime service uses to protect the VPU memory region
+ before authentication
+
+ intel,keembay-vpu-ipc-id:
+ $ref: "/schemas/types.yaml#/definitions/uint32"
+ description: The VPU ID to be passed to the VPU firmware.
+
+additionalProperties: False
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ vpu-ipc@3f00209c {
+ compatible = "intel,keembay-vpu-ipc";
+ reg = <0x3f00209c 0x10>,
+ <0x3f003008 0x4>,
+ <0x2082009c 0x10>,
+ <0x20821008 0x4>;
+ reg-names = "nce_wdt",
+ "nce_tim_cfg",
+ "mss_wdt",
+ "mss_tim_cfg";
+ memory-region = <&vpu_reserved>,
+ <&vpu_x509_reserved>,
+ <&mss_ipc_reserved>;
+ clocks = <&scmi_clk 0>,
+ <&scmi_clk 0>,
+ <&scmi_clk 1>,
+ <&scmi_clk 2>,
+ <&scmi_clk 3>,
+ <&scmi_clk 4>,
+ <&scmi_clk 5>,
+ <&scmi_clk 6>,
+ <&scmi_clk 7>,
+ <&scmi_clk 8>,
+ <&scmi_clk 9>,
+ <&scmi_clk 10>,
+ <&scmi_clk 11>;
+ clock-names = "cpu_clock",
+ "pll_0_out_0", "pll_0_out_1",
+ "pll_0_out_2", "pll_0_out_3",
+ "pll_1_out_0", "pll_1_out_1",
+ "pll_1_out_2", "pll_1_out_3",
+ "pll_2_out_0", "pll_2_out_1",
+ "pll_2_out_2", "pll_2_out_3";
+ interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "nce_wdt", "mss_wdt";
+ intel,keembay-vpu-ipc-nce-wdt-redirect = <63>;
+ intel,keembay-vpu-ipc-mss-wdt-redirect = <47>;
+ intel,keembay-vpu-ipc-imr = <9>;
+ intel,keembay-vpu-ipc-id = <0>;
+ };
--
2.17.1
^ permalink raw reply related [flat|nested] 9+ messages in thread