From: Hsin-Yi Wang <hsinyi@chromium.org>
To: CK Hu <ck.hu@mediatek.com>,
Philipp Zabel <p.zabel@pengutronix.de>,
Matthias Brugger <matthias.bgg@gmail.com>
Cc: David Airlie <airlied@linux.ie>, Daniel Vetter <daniel@ffwll.ch>,
Mark Rutland <mark.rutland@arm.com>,
dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-mediatek@lists.infradead.org,
Yongqiang Niu <yongqiang.niu@mediatek.com>
Subject: [PATCH v5 6/8] drm/mediatek: add matrix_bits private data for ccorr
Date: Mon, 1 Feb 2021 18:37:25 +0800 [thread overview]
Message-ID: <20210201103727.376721-7-hsinyi@chromium.org> (raw)
In-Reply-To: <20210201103727.376721-1-hsinyi@chromium.org>
From: Yongqiang Niu <yongqiang.niu@mediatek.com>
Add matrix_bits and coeffs_precision to ccorr private data:
- matrix bits of mt8183 is 10
- matrix bits of mt8192 is 11
Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com>
Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org>
---
drivers/gpu/drm/mediatek/mtk_disp_ccorr.c | 34 ++++++++++++++++-------
1 file changed, 24 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ccorr.c b/drivers/gpu/drm/mediatek/mtk_disp_ccorr.c
index 6c86673a835c3..fb86f3a8b3a18 100644
--- a/drivers/gpu/drm/mediatek/mtk_disp_ccorr.c
+++ b/drivers/gpu/drm/mediatek/mtk_disp_ccorr.c
@@ -29,8 +29,10 @@
#define DISP_CCORR_COEF_3 0x008C
#define DISP_CCORR_COEF_4 0x0090
+#define CCORR_MATRIX_BITS 10
+
struct mtk_disp_ccorr_data {
- u32 reserved;
+ u32 matrix_bits;
};
/**
@@ -85,21 +87,22 @@ void mtk_ccorr_stop(struct device *dev)
writel_relaxed(0x0, ccorr->regs + DISP_CCORR_EN);
}
-/* Converts a DRM S31.32 value to the HW S1.10 format. */
-static u16 mtk_ctm_s31_32_to_s1_10(u64 in)
+/* Converts a DRM S31.32 value to the HW S1.n format. */
+static u16 mtk_ctm_s31_32_to_s1_n(u64 in, u32 n)
{
u16 r;
/* Sign bit. */
- r = in & BIT_ULL(63) ? BIT(11) : 0;
+ r = in & BIT_ULL(63) ? BIT(n + 1) : 0;
if ((in & GENMASK_ULL(62, 33)) > 0) {
- /* identity value 0x100000000 -> 0x400, */
+ /* identity value 0x100000000 -> 0x400(mt8183), */
+ /* identity value 0x100000000 -> 0x800(mt8192), */
/* if bigger this, set it to max 0x7ff. */
- r |= GENMASK(10, 0);
+ r |= GENMASK(n, 0);
} else {
- /* take the 11 most important bits. */
- r |= (in >> 22) & GENMASK(10, 0);
+ /* take the n+1 most important bits. */
+ r |= (in >> (32 - n)) & GENMASK(n, 0);
}
return r;
@@ -114,6 +117,7 @@ void mtk_ccorr_ctm_set(struct device *dev, struct drm_crtc_state *state)
uint16_t coeffs[9] = { 0 };
int i;
struct cmdq_pkt *cmdq_pkt = NULL;
+ u32 matrix_bits;
if (!blob)
return;
@@ -121,8 +125,13 @@ void mtk_ccorr_ctm_set(struct device *dev, struct drm_crtc_state *state)
ctm = (struct drm_color_ctm *)blob->data;
input = ctm->matrix;
+ if (ccorr->data)
+ matrix_bits = ccorr->data->matrix_bits;
+ else
+ matrix_bits = CCORR_MATRIX_BITS;
+
for (i = 0; i < ARRAY_SIZE(coeffs); i++)
- coeffs[i] = mtk_ctm_s31_32_to_s1_10(input[i]);
+ coeffs[i] = mtk_ctm_s31_32_to_s1_n(input[i], matrix_bits);
mtk_ddp_write(cmdq_pkt, coeffs[0] << 16 | coeffs[1],
&ccorr->cmdq_reg, ccorr->regs, DISP_CCORR_COEF_0);
@@ -199,8 +208,13 @@ static int mtk_disp_ccorr_remove(struct platform_device *pdev)
return 0;
}
+static const struct mtk_disp_ccorr_data mt8183_ccorr_driver_data = {
+ .matrix_bits = CCORR_MATRIX_BITS,
+};
+
static const struct of_device_id mtk_disp_ccorr_driver_dt_match[] = {
- { .compatible = "mediatek,mt8183-disp-ccorr"},
+ { .compatible = "mediatek,mt8183-disp-ccorr",
+ .data = &mt8183_ccorr_driver_data},
{},
};
MODULE_DEVICE_TABLE(of, mtk_disp_ccorr_driver_dt_match);
--
2.30.0.365.g02bc693789-goog
next prev parent reply other threads:[~2021-02-01 10:39 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-02-01 10:37 [PATCH v5 0/8] drm/mediatek: add support for mediatek SOC MT8192 Hsin-Yi Wang
2021-02-01 10:37 ` [PATCH v5 1/8] drm/mediatek: add component OVL_2L2 Hsin-Yi Wang
2021-02-01 10:37 ` [PATCH v5 2/8] drm/mediatek: add component POSTMASK Hsin-Yi Wang
2021-02-02 5:43 ` CK Hu
2021-02-01 10:37 ` [PATCH v5 3/8] drm/mediatek: add component RDMA4 Hsin-Yi Wang
2021-02-01 10:37 ` [PATCH v5 4/8] drm/mediatek: separate ccorr module Hsin-Yi Wang
2021-02-02 5:44 ` CK Hu
2021-02-01 10:37 ` [PATCH v5 5/8] drm/mediatek: Fix ccorr size config Hsin-Yi Wang
2021-02-02 5:44 ` CK Hu
2021-02-01 10:37 ` Hsin-Yi Wang [this message]
2021-02-02 5:47 ` [PATCH v5 6/8] drm/mediatek: add matrix_bits private data for ccorr CK Hu
2021-02-01 10:37 ` [PATCH v5 7/8] soc: mediatek: add mtk mutex support for MT8192 Hsin-Yi Wang
2021-02-01 10:37 ` [PATCH v5 8/8] drm/mediatek: add support for mediatek SOC MT8192 Hsin-Yi Wang
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