From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.5 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id CE81BC433E0 for ; Tue, 2 Feb 2021 10:40:03 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 81E2964F63 for ; Tue, 2 Feb 2021 10:40:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229835AbhBBKkC (ORCPT ); Tue, 2 Feb 2021 05:40:02 -0500 Received: from esa6.hgst.iphmx.com ([216.71.154.45]:35920 "EHLO esa6.hgst.iphmx.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229739AbhBBKj6 (ORCPT ); Tue, 2 Feb 2021 05:39:58 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=wdc.com; i=@wdc.com; q=dns/txt; s=dkim.wdc.com; t=1612262398; x=1643798398; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=ZVJszlCUeT8A82U+e6McWWtmRXvcdjQ3DcRByG4VQwg=; b=Yc6AmMxl81ihHqqtVPFz0IKG2s9VxxxmDDXZupTIu24C1zr4VM1uxn1d rIEAWOiCDTGjPSSNT4rofiKeZSNsay01GGGat/yQrcs1Apy6sy8zRL6GO jKafHMyjFa6YKWwzVOjgViScGzqRkUL45U4um6akhhBgmBgHLh0913PKm DxKMa4S6Y7hFMMSlsBMSko6d7R8sy7k8qmdVVQMJdocEgynqyl8d1670L 98SGiQXXcWRKXNUjkAVbNWekrdyxPBH56fI1pcLMwvqI7gf8YVCMMua36 XJ34jBD6bxSQPok5pNDATgfkufV6dlvS5eTPFdF0b209kIzJQhYmYMvvW Q==; IronPort-SDR: jlN/biJGVK07xZajU/8bj2E/Z1XcpsGQ2JGNzil0M3wQeeYRtOR16WUt5B0In8p/S7s9iAtCHG xoFY0G6MBcAWVyR8QyXxFruWi1U4W1xrqcnb8mXHoSsu923ewS9Dp9IUQSgxIE4H0s17/y3ZqF 58C95591/fHFRPD/c2UPY2v4V79LwKCjcq8HMEq22zHXHvpAk8a2H7dc7Lw04ZzUPp1/TjVgs3 JI8cznLF42Wee/cf6GT8BflaOy632ttr4AESpMgR5r+HRmWYATXFwPyIkGp2lWElvzA1GO54JO jlQ= X-IronPort-AV: E=Sophos;i="5.79,394,1602518400"; d="scan'208";a="160092508" Received: from uls-op-cesaip01.wdc.com (HELO uls-op-cesaep01.wdc.com) ([199.255.45.14]) by ob1.hgst.iphmx.com with ESMTP; 02 Feb 2021 18:36:58 +0800 IronPort-SDR: fFrUaEnHyM4Fu9ecMTB6miV1vZQM0+CMh1zW4cISUDpMOtVM0omJ4K/MBk+iA9x0l9cr2wIeqy oFIkHFUvskzdVsCIvOL6UvNCvAWzPyW80+jKqXPzYk/5u8PIyxc+xOKLmFSixzDJOrLtKQWv2y PrIOesYpJenTOyUZ5vGNQuGCdQ5tPNfxmbfOpgaNiZLd8y8gI6ZjV759ltu+VreOjihSd4byYK l9SiqYCthPf2Eugommcnq3Rr8mzv8sBUgOAIOx0La8yH7lIofrMXxI/jDBs9mwm6iIPXsHFmY2 RQxJvii8XcLPICiml8M+uLX+ Received: from uls-op-cesaip01.wdc.com ([10.248.3.36]) by uls-op-cesaep01.wdc.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Feb 2021 02:21:07 -0800 IronPort-SDR: BSHNUdv4djXSvUKs855KJID1FUHgVR6d1vfvNrfEhKxUgZV3AnDlRo4+oRSkm8ZQartDn0qFKs C932FBG7ih+cTRuUXcuVwa0PpmJhoLrJJy4eHzLbtag3g9xsD8w79tYvwwjx1uwLL+yTZZrx/i 7OKNWujDoM95ainpknAQlIiq9kQ1NfOvBZ5D8vWn571zDYUInmocwmCPbjzgkzFdD2SFVDwAcY W3oM5FURiBTHGrqJbRuCqhMLNd/vI8dzWWG+PZflnwkeJKfPqUVvcGJXnGYQKiNwLKouHBhz8o 4bw= WDCIronportException: Internal Received: from wdapacbjl0003.my.asia.wdc.com (HELO twashi.fujisawa.hgst.com) ([10.84.71.58]) by uls-op-cesaip01.wdc.com with ESMTP; 02 Feb 2021 02:36:58 -0800 From: Damien Le Moal To: Palmer Dabbelt , linux-riscv@lists.infradead.org Cc: Atish Patra , Anup Patel , Sean Anderson , Rob Herring , devicetree@vger.kernel.org Subject: [PATCH v14 10/16] riscv: Add SiPeed MAIX BiT board device tree Date: Tue, 2 Feb 2021 19:36:17 +0900 Message-Id: <20210202103623.200809-11-damien.lemoal@wdc.com> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20210202103623.200809-1-damien.lemoal@wdc.com> References: <20210202103623.200809-1-damien.lemoal@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add the device tree sipeed_maix_bit.dts for the SiPeed MAIX BiT and MAIX BiTm boards. This device tree enables LEDs, gpio, i2c and spi/mmc SD card devices. Cc: Rob Herring Cc: devicetree@vger.kernel.org Signed-off-by: Damien Le Moal --- .../riscv/boot/dts/canaan/sipeed_maix_bit.dts | 234 ++++++++++++++++++ 1 file changed, 234 insertions(+) create mode 100644 arch/riscv/boot/dts/canaan/sipeed_maix_bit.dts diff --git a/arch/riscv/boot/dts/canaan/sipeed_maix_bit.dts b/arch/riscv/boot/dts/canaan/sipeed_maix_bit.dts new file mode 100644 index 000000000000..11e491410f00 --- /dev/null +++ b/arch/riscv/boot/dts/canaan/sipeed_maix_bit.dts @@ -0,0 +1,234 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2019-20 Sean Anderson + * Copyright (C) 2020 Western Digital Corporation or its affiliates. + */ + +/dts-v1/; + +#include "k210.dtsi" + +#include +#include +#include + +/ { + model = "SiPeed MAIX BiT"; + compatible = "sipeed,maix-bit", "sipeed,maix-bitm", + "canaan,kendryte-k210"; + + chosen { + bootargs = "earlycon console=ttySIF0"; + stdout-path = "serial0:115200n8"; + }; + + gpio-leds { + compatible = "gpio-leds"; + + led0 { + color = ; + label = "green"; + gpios = <&gpio1_0 4 GPIO_ACTIVE_LOW>; + }; + + led1 { + color = ; + label = "red"; + gpios = <&gpio1_0 5 GPIO_ACTIVE_LOW>; + }; + + led2 { + color = ; + label = "blue"; + gpios = <&gpio1_0 6 GPIO_ACTIVE_LOW>; + }; + }; + + gpio-keys { + compatible = "gpio-keys"; + + boot { + label = "BOOT"; + linux,code = ; + gpios = <&gpio0 0 GPIO_ACTIVE_LOW>; + }; + }; + + sound { + compatible = "simple-audio-card"; + simple-audio-card,format = "i2s"; + status = "disabled"; + + simple-audio-card,cpu { + sound-dai = <&i2s0 0>; + }; + + simple-audio-card,codec { + sound-dai = <&mic>; + }; + }; + + mic: mic { + #sound-dai-cells = <0>; + compatible = "memsensing,msm261s4030h0"; + status = "disabled"; + }; +}; + +&fpioa { + pinctrl-names = "default"; + pinctrl-0 = <&jtag_pinctrl>; + status = "okay"; + + jtag_pinctrl: jtag-pinmux { + pinmux = , + , + , + ; + }; + + uarths_pinctrl: uarths-pinmux { + pinmux = , + ; + }; + + gpio_pinctrl: gpio-pinmux { + pinmux = , + , + , + , + , + , + , + ; + }; + + gpiohs_pinctrl: gpiohs-pinmux { + pinmux = , + , + , + , + , + , + , + , + , + , + ; + }; + + i2s0_pinctrl: i2s0-pinmux { + pinmux = , + , + ; + }; + + dvp_pinctrl: dvp-pinmux { + pinmux = , + , + , + , + , + , + , + ; + }; + + spi0_pinctrl: spi0-pinmux { + pinmux = , /* cs */ + , /* rst */ + , /* dc */ + ; /* wr */ + }; + + spi1_pinctrl: spi1-pinmux { + pinmux = , + , + , + ; /* cs */ + }; + + i2c1_pinctrl: i2c1-pinmux { + pinmux = , + ; + }; +}; + +&uarths0 { + pinctrl-0 = <&uarths_pinctrl>; + pinctrl-names = "default"; + status = "okay"; +}; + +&gpio0 { + pinctrl-0 = <&gpiohs_pinctrl>; + pinctrl-names = "default"; + status = "okay"; +}; + +&gpio1 { + pinctrl-0 = <&gpio_pinctrl>; + pinctrl-names = "default"; + status = "okay"; +}; + +&i2s0 { + #sound-dai-cells = <1>; + pinctrl-0 = <&i2s0_pinctrl>; + pinctrl-names = "default"; +}; + +&i2c1 { + pinctrl-0 = <&i2c1_pinctrl>; + pinctrl-names = "default"; + clock-frequency = <400000>; + status = "okay"; +}; + +&dvp0 { + pinctrl-0 = <&dvp_pinctrl>; + pinctrl-names = "default"; +}; + +&spi0 { + pinctrl-0 = <&spi0_pinctrl>; + pinctrl-names = "default"; + num-cs = <1>; + cs-gpios = <&gpio0 20 GPIO_ACTIVE_HIGH>; + + panel@0 { + compatible = "sitronix,st7789v"; + reg = <0>; + reset-gpios = <&gpio0 21 GPIO_ACTIVE_LOW>; + dc-gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>; + spi-max-frequency = <15000000>; + spi-cs-high; + status = "disabled"; + }; +}; + +&spi1 { + pinctrl-0 = <&spi1_pinctrl>; + pinctrl-names = "default"; + num-cs = <1>; + cs-gpios = <&gpio0 13 GPIO_ACTIVE_LOW>; + status = "okay"; + + slot@0 { + compatible = "mmc-spi-slot"; + reg = <0>; + voltage-ranges = <3300 3300>; + spi-max-frequency = <25000000>; + broken-cd; + }; +}; + +&spi3 { + spi-flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <50000000>; + m25p,fast-read; + broken-flash-reset; + }; +}; -- 2.29.2