From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-11.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS,UNPARSEABLE_RELAY,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A5F12C433E0 for ; Wed, 3 Feb 2021 05:54:57 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 1EA6E64F69 for ; Wed, 3 Feb 2021 05:54:57 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229845AbhBCFyk (ORCPT ); Wed, 3 Feb 2021 00:54:40 -0500 Received: from mailgw01.mediatek.com ([210.61.82.183]:32845 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S229831AbhBCFyj (ORCPT ); Wed, 3 Feb 2021 00:54:39 -0500 X-UUID: 928c5272a54a49d29c504588855f962e-20210203 X-UUID: 928c5272a54a49d29c504588855f962e-20210203 Received: from mtkcas06.mediatek.inc [(172.21.101.30)] by mailgw01.mediatek.com (envelope-from ) (Cellopoint E-mail Firewall v4.1.14 Build 0819 with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 1238875708; Wed, 03 Feb 2021 13:53:57 +0800 Received: from MTKCAS06.mediatek.inc (172.21.101.30) by mtkmbs07n1.mediatek.inc (172.21.101.16) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Wed, 3 Feb 2021 13:53:55 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by MTKCAS06.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Wed, 3 Feb 2021 13:53:56 +0800 From: Seiya Wang To: Will Deacon , Mark Rutland , Rob Herring CC: Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Alexander Shishkin , Jiri Olsa , Namhyung Kim , Catalin Marinas , Matthias Brugger , , , , , Subject: [PATCH v2 0/2] Add support for ARM Cortex-A78 PMU Date: Wed, 3 Feb 2021 13:53:46 +0800 Message-ID: <20210203055348.4935-1-seiya.wang@mediatek.com> X-Mailer: git-send-email 2.14.1 MIME-Version: 1.0 Content-Type: text/plain X-MTK: N Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add support for ARM Cortex-A78 PMU since it will be used in new Mediatek SoC. Based on v5.11-rc6 Change in v2: Remove change-id in commit message Seiya Wang (2): arm64: perf: add support for Cortex-A78 dt-bindings: arm: add Cortex-A78 binding Documentation/devicetree/bindings/arm/pmu.yaml | 1 + arch/arm64/kernel/perf_event.c | 7 +++++++ 2 files changed, 8 insertions(+) -- 2.14.1