Re: [PATCH v9 2/7] clk: clock-wizard: Add the clockwizard to clk directory

[Miquel Raynal <miquel.raynal@bootlin.com>]

Hi Shubhrajyoti,

Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com> wrote on Thu, 18 Feb
2021 10:19:46 +0530:

> Add clocking wizard driver to clk.
> And delete the driver from the staging as it is in drivers/clk.
> 
> Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com>
> ---
> v7:
> Combined the patch for deletion and add of the driver
> dropping the ack from Greg for the staging as it is a combined patch.
> Add vendor prefix to speedgrade
> v8:
> No change
> v9:
> No change
> 
>  drivers/clk/Kconfig                                |  9 +++++++
>  drivers/clk/Makefile                               |  1 +
>  .../clk-xlnx-clock-wizard.c                        |  6 +++--
>  drivers/staging/Kconfig                            |  2 --
>  drivers/staging/Makefile                           |  1 -
>  drivers/staging/clocking-wizard/Kconfig            | 10 --------
>  drivers/staging/clocking-wizard/Makefile           |  2 --
>  drivers/staging/clocking-wizard/TODO               | 12 ---------
>  drivers/staging/clocking-wizard/dt-binding.txt     | 30 ----------------------
>  9 files changed, 14 insertions(+), 59 deletions(-)
>  rename drivers/{staging/clocking-wizard => clk}/clk-xlnx-clock-wizard.c (98%)
>  delete mode 100644 drivers/staging/clocking-wizard/Kconfig
>  delete mode 100644 drivers/staging/clocking-wizard/Makefile
>  delete mode 100644 drivers/staging/clocking-wizard/TODO
>  delete mode 100644 drivers/staging/clocking-wizard/dt-binding.txt
> 
> diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig
> index c715d46..d210ed2 100644
> --- a/drivers/clk/Kconfig
> +++ b/drivers/clk/Kconfig
> @@ -359,6 +359,15 @@ config COMMON_CLK_FIXED_MMIO
>  	help
>  	  Support for Memory Mapped IO Fixed clocks
>  
> +config COMMON_CLK_XLNX_CLKWZRD
> +	tristate "Xilinx Clocking Wizard"
> +	depends on COMMON_CLK && OF
> +	help
> +	  Support for the Xilinx Clocking Wizard IP core clock generator.
> +	  Adds support for clocking wizard and compatible.
> +	  This driver supports the Xilinx clocking wizard programmable clock
> +	  synthesizer. The number of output is configurable in the design.
> +
>  source "drivers/clk/actions/Kconfig"
>  source "drivers/clk/analogbits/Kconfig"
>  source "drivers/clk/baikal-t1/Kconfig"
> diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile
> index da8fcf1..1ad6414 100644
> --- a/drivers/clk/Makefile
> +++ b/drivers/clk/Makefile
> @@ -69,6 +69,7 @@ obj-$(CONFIG_ARCH_VT8500)		+= clk-vt8500.o
>  obj-$(CONFIG_COMMON_CLK_VC5)		+= clk-versaclock5.o
>  obj-$(CONFIG_COMMON_CLK_WM831X)		+= clk-wm831x.o
>  obj-$(CONFIG_COMMON_CLK_XGENE)		+= clk-xgene.o
> +obj-$(CONFIG_COMMON_CLK_XLNX_CLKWZRD)	+= clk-xlnx-clock-wizard.o
>  
>  # please keep this section sorted lexicographically by directory path name
>  obj-y					+= actions/
> diff --git a/drivers/staging/clocking-wizard/clk-xlnx-clock-wizard.c b/drivers/clk/clk-xlnx-clock-wizard.c
> similarity index 98%
> rename from drivers/staging/clocking-wizard/clk-xlnx-clock-wizard.c
> rename to drivers/clk/clk-xlnx-clock-wizard.c
> index e52a64b..1bab68e 100644
> --- a/drivers/staging/clocking-wizard/clk-xlnx-clock-wizard.c
> +++ b/drivers/clk/clk-xlnx-clock-wizard.c
> @@ -2,9 +2,11 @@
>  /*
>   * Xilinx 'Clocking Wizard' driver
>   *
> - *  Copyright (C) 2013 - 2014 Xilinx
> + *  Copyright (C) 2013 - 2020 Xilinx
>   *
>   *  Sören Brinkmann <soren.brinkmann@xilinx.com>
> + *  Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com>
> + *
>   */
>  
>  #include <linux/platform_device.h>
> @@ -146,7 +148,7 @@ static int clk_wzrd_probe(struct platform_device *pdev)
>  	if (IS_ERR(clk_wzrd->base))
>  		return PTR_ERR(clk_wzrd->base);
>  
> -	ret = of_property_read_u32(np, "speed-grade", &clk_wzrd->speed_grade);
> +	ret = of_property_read_u32(np, "xlnx,speed-grade", &clk_wzrd->speed_grade);

Should not be part of this commit.

You should do a mv src.c dest.c, that's all.

>  	if (!ret) {
>  		if (clk_wzrd->speed_grade < 1 || clk_wzrd->speed_grade > 3) {
>  			dev_warn(&pdev->dev, "invalid speed grade '%d'\n",


Thanks,
Miquèl