From: Kishon Vijay Abraham I <kishon@ti.com>
To: Kishon Vijay Abraham I <kishon@ti.com>,
Vinod Koul <vkoul@kernel.org>, Rob Herring <robh+dt@kernel.org>,
Philipp Zabel <p.zabel@pengutronix.de>,
Swapnil Jakhade <sjakhade@cadence.com>
Cc: <linux-kernel@vger.kernel.org>, <devicetree@vger.kernel.org>,
Lokesh Vutla <lokeshvutla@ti.com>
Subject: [PATCH v5 06/13] phy: cadence: cadence-sierra: Move all reset_control_get*() to a separate function
Date: Mon, 8 Mar 2021 10:37:25 +0530 [thread overview]
Message-ID: <20210308050732.7140-7-kishon@ti.com> (raw)
In-Reply-To: <20210308050732.7140-1-kishon@ti.com>
No functional change. Group devm_reset_control_get() and
devm_reset_control_get_optional() to a separate function.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
---
drivers/phy/cadence/phy-cadence-sierra.c | 36 ++++++++++++++++--------
1 file changed, 25 insertions(+), 11 deletions(-)
diff --git a/drivers/phy/cadence/phy-cadence-sierra.c b/drivers/phy/cadence/phy-cadence-sierra.c
index 7bf1b4c7774a..935f165404e4 100644
--- a/drivers/phy/cadence/phy-cadence-sierra.c
+++ b/drivers/phy/cadence/phy-cadence-sierra.c
@@ -509,6 +509,28 @@ static int cdns_sierra_phy_get_clocks(struct cdns_sierra_phy *sp,
return 0;
}
+static int cdns_sierra_phy_get_resets(struct cdns_sierra_phy *sp,
+ struct device *dev)
+{
+ struct reset_control *rst;
+
+ rst = devm_reset_control_get(dev, "sierra_reset");
+ if (IS_ERR(rst)) {
+ dev_err(dev, "failed to get reset\n");
+ return PTR_ERR(rst);
+ }
+ sp->phy_rst = rst;
+
+ rst = devm_reset_control_get_optional(dev, "sierra_apb");
+ if (IS_ERR(rst)) {
+ dev_err(dev, "failed to get apb reset\n");
+ return PTR_ERR(rst);
+ }
+ sp->apb_rst = rst;
+
+ return 0;
+}
+
static int cdns_sierra_phy_probe(struct platform_device *pdev)
{
struct cdns_sierra_phy *sp;
@@ -559,17 +581,9 @@ static int cdns_sierra_phy_probe(struct platform_device *pdev)
if (ret)
return ret;
- sp->phy_rst = devm_reset_control_get(dev, "sierra_reset");
- if (IS_ERR(sp->phy_rst)) {
- dev_err(dev, "failed to get reset\n");
- return PTR_ERR(sp->phy_rst);
- }
-
- sp->apb_rst = devm_reset_control_get_optional(dev, "sierra_apb");
- if (IS_ERR(sp->apb_rst)) {
- dev_err(dev, "failed to get apb reset\n");
- return PTR_ERR(sp->apb_rst);
- }
+ ret = cdns_sierra_phy_get_resets(sp, dev);
+ if (ret)
+ return ret;
ret = clk_prepare_enable(sp->clk);
if (ret)
--
2.17.1
next prev parent reply other threads:[~2021-03-08 5:08 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-03-08 5:07 [PATCH v5 00/13] PHY: Add support in Sierra to use external clock Kishon Vijay Abraham I
2021-03-08 5:07 ` [PATCH v5 01/13] phy: cadence: Sierra: Fix PHY power_on sequence Kishon Vijay Abraham I
2021-03-08 5:07 ` [PATCH v5 02/13] phy: ti: j721e-wiz: Invoke wiz_init() before of_platform_device_create() Kishon Vijay Abraham I
2021-03-08 5:07 ` [PATCH v5 03/13] phy: cadence: cadence-sierra: Create PHY only for "phy" or "link" sub-nodes Kishon Vijay Abraham I
2021-03-08 5:07 ` [PATCH v5 04/13] phy: ti: j721e-wiz: Get PHY properties only for "phy" or "link" subnode Kishon Vijay Abraham I
2021-03-08 5:07 ` [PATCH v5 05/13] phy: cadence: cadence-sierra: Move all clk_get_*() to a separate function Kishon Vijay Abraham I
2021-03-08 5:07 ` Kishon Vijay Abraham I [this message]
2021-03-08 5:07 ` [PATCH v5 07/13] phy: cadence: cadence-sierra: Explicitly request exclusive reset control Kishon Vijay Abraham I
2021-03-08 5:07 ` [PATCH v5 08/13] phy: cadence-torrent: Use a common header file for Cadence SERDES Kishon Vijay Abraham I
2021-03-08 5:07 ` [PATCH v5 09/13] phy: cadence: cadence-sierra: Add array of input clocks in "struct cdns_sierra_phy" Kishon Vijay Abraham I
2021-03-08 5:07 ` [PATCH v5 10/13] phy: cadence: cadence-sierra: Add missing clk_disable_unprepare() in .remove callback Kishon Vijay Abraham I
2021-03-08 5:07 ` [PATCH v5 11/13] dt-bindings: phy: phy-cadence-sierra: Add binding to model Sierra as clock provider Kishon Vijay Abraham I
2021-03-08 23:09 ` Rob Herring
2021-03-08 5:07 ` [PATCH v5 12/13] phy: cadence: phy-cadence-sierra: Model PLL_CMNLC and PLL_CMNLC1 as clocks (mux clocks) Kishon Vijay Abraham I
2021-03-08 5:07 ` [PATCH v5 13/13] phy: cadence: sierra: Enable pll_cmnlc and pll_cmnlc1 clocks Kishon Vijay Abraham I
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20210308050732.7140-7-kishon@ti.com \
--to=kishon@ti.com \
--cc=devicetree@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=lokeshvutla@ti.com \
--cc=p.zabel@pengutronix.de \
--cc=robh+dt@kernel.org \
--cc=sjakhade@cadence.com \
--cc=vkoul@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).