From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C832DC433DB for ; Tue, 9 Mar 2021 05:33:53 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 6E5846518A for ; Tue, 9 Mar 2021 05:33:53 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229900AbhCIFdX (ORCPT ); Tue, 9 Mar 2021 00:33:23 -0500 Received: from mail-out.m-online.net ([212.18.0.10]:58612 "EHLO mail-out.m-online.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230107AbhCIFdO (ORCPT ); Tue, 9 Mar 2021 00:33:14 -0500 Received: from frontend01.mail.m-online.net (unknown [192.168.8.182]) by mail-out.m-online.net (Postfix) with ESMTP id 4DvkQ12d6Fz1ryWv; Tue, 9 Mar 2021 06:33:13 +0100 (CET) Received: from localhost (dynscan1.mnet-online.de [192.168.6.70]) by mail.m-online.net (Postfix) with ESMTP id 4DvkQ12HNRz1qqkj; Tue, 9 Mar 2021 06:33:13 +0100 (CET) X-Virus-Scanned: amavisd-new at mnet-online.de Received: from mail.mnet-online.de ([192.168.8.182]) by localhost (dynscan1.mail.m-online.net [192.168.6.70]) (amavisd-new, port 10024) with ESMTP id qYN8OXK6qdqp; Tue, 9 Mar 2021 06:33:12 +0100 (CET) X-Auth-Info: 7H9ZuzYOlgckhbZe3cQsAhymwIhMvDJcyDnlSXlJm7E= Received: from mail-internal.denx.de (p578adb1c.dip0.t-ipconnect.de [87.138.219.28]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.mnet-online.de (Postfix) with ESMTPSA; Tue, 9 Mar 2021 06:33:12 +0100 (CET) Received: from pollux.denx.de (pollux [192.168.1.1]) by mail-internal.denx.de (Postfix) with ESMTP id 269BF18510F; Tue, 9 Mar 2021 06:31:22 +0100 (CET) Received: by pollux.denx.de (Postfix, from userid 515) id 1B7351A0092; Tue, 9 Mar 2021 06:31:22 +0100 (CET) From: Heiko Schocher To: linux-arm-kernel@lists.infradead.org Cc: Heiko Schocher , Fabio Estevam , Krzysztof Kozlowski , NXP Linux Team , Pengutronix Kernel Team , Rob Herring , Sascha Hauer , Shawn Guo , Teresa Remmet , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 4/4] arm64: imx8mp: imx8mp-phycore-som enable spi nor Date: Tue, 9 Mar 2021 06:31:16 +0100 Message-Id: <20210309053116.1486347-5-hs@denx.de> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20210309053116.1486347-1-hs@denx.de> References: <20210309053116.1486347-1-hs@denx.de> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org enable the mt25qu256aba spi nor on the imx8mp-phycore-som. Signed-off-by: Heiko Schocher --- Changes in v2: - work in comments from Marco and Teresa - rename node into "'som_flash: flash@0 { }" - compatible is now first entry - removed #size-cells and #address-cells as no child node. If bootloader adds them bootloader can add them too. .../dts/freescale/imx8mp-phycore-som.dtsi | 25 +++++++++++++++++++ 1 file changed, 25 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi index 44a8c2337cee4..e648b1b6acdaa 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi @@ -65,6 +65,20 @@ ethphy1: ethernet-phy@0 { }; }; +&flexspi { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_flexspi0>; + status = "okay"; + + som_flash: flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <80000000>; + spi-tx-bus-width = <4>; + spi-rx-bus-width = <4>; + }; +}; + &i2c1 { clock-frequency = <400000>; pinctrl-names = "default"; @@ -217,6 +231,17 @@ MX8MP_IOMUXC_GPIO1_IO15__GPIO1_IO15 0x11 >; }; + pinctrl_flexspi0: flexspi0grp { + fsl,pins = < + MX8MP_IOMUXC_NAND_ALE__FLEXSPI_A_SCLK 0x1c2 + MX8MP_IOMUXC_NAND_CE0_B__FLEXSPI_A_SS0_B 0x82 + MX8MP_IOMUXC_NAND_DATA00__FLEXSPI_A_DATA00 0x82 + MX8MP_IOMUXC_NAND_DATA01__FLEXSPI_A_DATA01 0x82 + MX8MP_IOMUXC_NAND_DATA02__FLEXSPI_A_DATA02 0x82 + MX8MP_IOMUXC_NAND_DATA03__FLEXSPI_A_DATA03 0x82 + >; + }; + pinctrl_i2c1: i2c1grp { fsl,pins = < MX8MP_IOMUXC_I2C1_SCL__I2C1_SCL 0x400001c3 -- 2.29.2