From: Dmitry Osipenko <digetx@gmail.com>
To: Thierry Reding <thierry.reding@gmail.com>,
Jonathan Hunter <jonathanh@nvidia.com>,
Peter De Schrijver <pdeschrijver@nvidia.com>,
Prashant Gaikwad <pgaikwad@nvidia.com>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh+dt@kernel.org>
Cc: linux-tegra@vger.kernel.org, linux-clk@vger.kernel.org,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org
Subject: [PATCH v4 0/7] Couple improvements for Tegra clk driver
Date: Fri, 12 Mar 2021 19:36:25 +0300 [thread overview]
Message-ID: <20210312163632.8861-1-digetx@gmail.com> (raw)
This series fixes couple minor standalone problems of the Tegra clk
driver.
Changelog:
v4: - Added new patch that converts DT bindings to schema.
v3: - Added acks from Thierry Reding that he gave to v2.
- Added new patch "clk: tegra: Don't allow zero clock rate for PLLs".
v2: - Added these new patches:
clk: tegra: Halve SCLK rate on Tegra20
MAINTAINERS: Hand Tegra clk driver to Jon and Thierry
v1: - Collected clk patches into a single series.
Dmitry Osipenko (7):
clk: tegra30: Use 300MHz for video decoder by default
clk: tegra: Fix refcounting of gate clocks
clk: tegra: Ensure that PLLU configuration is applied properly
clk: tegra: Halve SCLK rate on Tegra20
MAINTAINERS: Hand Tegra clk driver to Jon and Thierry
clk: tegra: Don't allow zero clock rate for PLLs
dt-bindings: clock: tegra: Convert to schema
CREDITS | 6 +
.../bindings/clock/nvidia,tegra-car.yaml | 118 ++++++++++++++++++
.../bindings/clock/nvidia,tegra114-car.txt | 63 ----------
.../bindings/clock/nvidia,tegra124-car.txt | 107 ----------------
.../bindings/clock/nvidia,tegra20-car.txt | 63 ----------
.../bindings/clock/nvidia,tegra210-car.txt | 56 ---------
.../bindings/clock/nvidia,tegra30-car.txt | 63 ----------
MAINTAINERS | 4 +-
drivers/clk/tegra/clk-periph-gate.c | 72 +++++++----
drivers/clk/tegra/clk-periph.c | 11 ++
drivers/clk/tegra/clk-pll.c | 12 +-
drivers/clk/tegra/clk-tegra20.c | 6 +-
drivers/clk/tegra/clk-tegra30.c | 2 +-
13 files changed, 195 insertions(+), 388 deletions(-)
create mode 100644 Documentation/devicetree/bindings/clock/nvidia,tegra-car.yaml
delete mode 100644 Documentation/devicetree/bindings/clock/nvidia,tegra114-car.txt
delete mode 100644 Documentation/devicetree/bindings/clock/nvidia,tegra124-car.txt
delete mode 100644 Documentation/devicetree/bindings/clock/nvidia,tegra20-car.txt
delete mode 100644 Documentation/devicetree/bindings/clock/nvidia,tegra210-car.txt
delete mode 100644 Documentation/devicetree/bindings/clock/nvidia,tegra30-car.txt
--
2.29.2
next reply other threads:[~2021-03-12 16:38 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-03-12 16:36 Dmitry Osipenko [this message]
2021-03-12 16:36 ` [PATCH v4 1/7] clk: tegra30: Use 300MHz for video decoder by default Dmitry Osipenko
2021-03-12 16:36 ` [PATCH v4 2/7] clk: tegra: Fix refcounting of gate clocks Dmitry Osipenko
2021-03-12 16:36 ` [PATCH v4 3/7] clk: tegra: Ensure that PLLU configuration is applied properly Dmitry Osipenko
2021-03-12 16:36 ` [PATCH v4 4/7] clk: tegra: Halve SCLK rate on Tegra20 Dmitry Osipenko
2021-03-12 16:36 ` [PATCH v4 5/7] MAINTAINERS: Hand Tegra clk driver to Jon and Thierry Dmitry Osipenko
2021-03-12 16:36 ` [PATCH v4 6/7] clk: tegra: Don't allow zero clock rate for PLLs Dmitry Osipenko
2021-03-12 16:36 ` [PATCH v4 7/7] dt-bindings: clock: tegra: Convert to schema Dmitry Osipenko
2021-03-15 14:22 ` Rob Herring
2021-03-15 15:53 ` Rob Herring
2021-03-15 19:07 ` Dmitry Osipenko
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