From: Dmitry Osipenko <digetx@gmail.com>
To: "Thierry Reding" <thierry.reding@gmail.com>,
"Jonathan Hunter" <jonathanh@nvidia.com>,
"Peter De Schrijver" <pdeschrijver@nvidia.com>,
"Prashant Gaikwad" <pgaikwad@nvidia.com>,
"Michael Turquette" <mturquette@baylibre.com>,
"Stephen Boyd" <sboyd@kernel.org>,
"Rob Herring" <robh+dt@kernel.org>,
"Michał Mirosław" <mirq-linux@rere.qmqm.pl>
Cc: linux-tegra@vger.kernel.org, linux-clk@vger.kernel.org,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org
Subject: [PATCH v6 0/7] Couple improvements for Tegra clk driver
Date: Sat, 20 Mar 2021 18:26:41 +0300 [thread overview]
Message-ID: <20210320152648.8389-1-digetx@gmail.com> (raw)
This series fixes couple minor standalone problems of the Tegra clk
driver.
Changelog:
v6: - Made a small improvement and corrected a typo in patch
"Fix refcounting of gate clocks" that were spotted by
Michał Mirosław.
v5: - Corrected example in the schema binding to silence dt_binding_check
warning.
- The Tegra124 binding is factored out into standalone binding since
Tegra124 has properties that aren't used by other SoCs and I couldn't
figure out how to make them conditional in schema.
v4: - Added new patch that converts DT bindings to schema.
v3: - Added acks from Thierry Reding that he gave to v2.
- Added new patch "clk: tegra: Don't allow zero clock rate for PLLs".
v2: - Added these new patches:
clk: tegra: Halve SCLK rate on Tegra20
MAINTAINERS: Hand Tegra clk driver to Jon and Thierry
v1: - Collected clk patches into a single series.
Dmitry Osipenko (7):
clk: tegra30: Use 300MHz for video decoder by default
clk: tegra: Fix refcounting of gate clocks
clk: tegra: Ensure that PLLU configuration is applied properly
clk: tegra: Halve SCLK rate on Tegra20
MAINTAINERS: Hand Tegra clk driver to Jon and Thierry
clk: tegra: Don't allow zero clock rate for PLLs
dt-bindings: clock: tegra: Convert to schema
CREDITS | 6 +
.../bindings/clock/nvidia,tegra114-car.txt | 63 ----------
.../bindings/clock/nvidia,tegra124-car.txt | 107 ----------------
.../bindings/clock/nvidia,tegra124-car.yaml | 115 ++++++++++++++++++
.../bindings/clock/nvidia,tegra20-car.txt | 63 ----------
.../bindings/clock/nvidia,tegra20-car.yaml | 69 +++++++++++
.../bindings/clock/nvidia,tegra210-car.txt | 56 ---------
.../bindings/clock/nvidia,tegra30-car.txt | 63 ----------
MAINTAINERS | 4 +-
drivers/clk/tegra/clk-periph-gate.c | 72 +++++++----
drivers/clk/tegra/clk-periph.c | 11 ++
drivers/clk/tegra/clk-pll.c | 12 +-
drivers/clk/tegra/clk-tegra20.c | 6 +-
drivers/clk/tegra/clk-tegra30.c | 2 +-
14 files changed, 261 insertions(+), 388 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/clock/nvidia,tegra114-car.txt
delete mode 100644 Documentation/devicetree/bindings/clock/nvidia,tegra124-car.txt
create mode 100644 Documentation/devicetree/bindings/clock/nvidia,tegra124-car.yaml
delete mode 100644 Documentation/devicetree/bindings/clock/nvidia,tegra20-car.txt
create mode 100644 Documentation/devicetree/bindings/clock/nvidia,tegra20-car.yaml
delete mode 100644 Documentation/devicetree/bindings/clock/nvidia,tegra210-car.txt
delete mode 100644 Documentation/devicetree/bindings/clock/nvidia,tegra30-car.txt
--
2.30.2
next reply other threads:[~2021-03-20 15:29 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-03-20 15:26 Dmitry Osipenko [this message]
2021-03-20 15:26 ` [PATCH v6 1/7] clk: tegra30: Use 300MHz for video decoder by default Dmitry Osipenko
2021-03-20 15:26 ` [PATCH v6 2/7] clk: tegra: Fix refcounting of gate clocks Dmitry Osipenko
2021-03-20 15:26 ` [PATCH v6 3/7] clk: tegra: Ensure that PLLU configuration is applied properly Dmitry Osipenko
2021-03-20 15:26 ` [PATCH v6 4/7] clk: tegra: Halve SCLK rate on Tegra20 Dmitry Osipenko
2021-03-20 15:26 ` [PATCH v6 5/7] MAINTAINERS: Hand Tegra clk driver to Jon and Thierry Dmitry Osipenko
2021-03-20 15:26 ` [PATCH v6 6/7] clk: tegra: Don't allow zero clock rate for PLLs Dmitry Osipenko
2021-03-20 15:26 ` [PATCH v6 7/7] dt-bindings: clock: tegra: Convert to schema Dmitry Osipenko
2021-03-23 22:38 ` Rob Herring
2021-03-30 15:40 ` [PATCH v6 0/7] Couple improvements for Tegra clk driver Dmitry Osipenko
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20210320152648.8389-1-digetx@gmail.com \
--to=digetx@gmail.com \
--cc=devicetree@vger.kernel.org \
--cc=jonathanh@nvidia.com \
--cc=linux-clk@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-tegra@vger.kernel.org \
--cc=mirq-linux@rere.qmqm.pl \
--cc=mturquette@baylibre.com \
--cc=pdeschrijver@nvidia.com \
--cc=pgaikwad@nvidia.com \
--cc=robh+dt@kernel.org \
--cc=sboyd@kernel.org \
--cc=thierry.reding@gmail.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).